Patents by Inventor Michael Fine

Michael Fine has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6188694
    Abstract: A shared spanning tree protocol (SSTP) creates a plurality of spanning trees (i.e., loop-free paths) which are shared among one or more virtual local area network (VLAN) designations for data transmission within a computer network. Each shared spanning tree includes and is defined by a primary VLAN and may be associated with one or more secondary VLANs. In order to associate VLAN designation(s) with a single shared spanning tree, network devices exchange novel shared spanning tree protocol data units (SST-PDUs). Each SST-PDU corresponds to a given primary VLAN and preferably includes one or more fields which list the secondary VLAN designations associated with the given primary VLAN. The association of VLAN designations to shared spanning trees, moreover, preferably depends on which path traffic is to follow as well as the anticipated load characteristics of the various VLANs. The association of VLAN designations to shared spanning trees thus provides a degree of load balancing within the network.
    Type: Grant
    Filed: December 23, 1997
    Date of Patent: February 13, 2001
    Assignee: Cisco Technology, Inc.
    Inventors: Michael Fine, Silvano Gai, Keith McCloghrie
  • Patent number: 6163543
    Abstract: A port aggregation protocol (PAGP) dynamically aggregates redundant links between two neighboring devices in a computer network through the exchange of aggregation protocol data unit (AGPDU) frames between the two devices. Each AGPDU frame contains a unique identifier corresponding to the device sourcing the frame and a port number corresponding to the port through which the frame is forwarded. The exchange of AGPDU frames and the information contained therein allows the neighboring devices to identify those ports corresponding to the redundant links. Each device then dynamically aggregates its ports corresponding to the redundant links into a logical aggregation port (agport) which appears as a single, high-bandwidth port or interface to other processes executing on the device.
    Type: Grant
    Filed: May 17, 1999
    Date of Patent: December 19, 2000
    Assignee: Cisco Technology, Inc.
    Inventors: Hon Wah Chin, Michael Fine, Norman W. Finn, Richard J. Hausman
  • Patent number: 6052423
    Abstract: There is disclosed a bit sync search and frame sync search system operative with a digital data signal as transmitted by a digital radio transmitter. The bit search is implemented by detecting a predetermined phasing signal which is incorporated in the digital signal and which has a repetitive bit pattern of ones and zeroes. The phasing signal is first detected by providing an in-phase and quadrature component signal and correlating those signals to provide an output signal indicative of the bit pattern in the phasing signal. After the phasing signal has been provided and an oscillator associated with a receiving apparatus is compensated according to the detected phasing signal, a tracking mode is entered, whereby a frame signal is captured and the system generates histograms of data bit transitions for producing an error signal indicative of the difference of the transmitted clock rate and the sampling portion of a received bit.
    Type: Grant
    Filed: July 8, 1999
    Date of Patent: April 18, 2000
    Assignee: ITT Manufacturing Enterprises, Inc.
    Inventors: Gary Vincent Blois, Joseph Michael Fine, Marvin A. Epstein
  • Patent number: 6002728
    Abstract: There is disclosed a bit sync search and frame sync search system operative with a digital data signal as transmitted by a digital radio transmitter. The bit search is implemented by detecting a predetermined phasing signal which is incorporated in the digital signal and which has a repetitive bit pattern of ones and zeroes. The phasing signal is first detected by providing 94 in-phase and quadrature component signals and correlating those signals to provide an output signal indicative of the bit pattern in the phasing signal. After the phasing signal has been provided and an oscillator associated with a receiving apparatus is compensated according to the detected phasing signal, a tracking mode is entered, whereby a frame signal is captured and the system generates histograms of data bit transitions for producing an error signal indicative of the difference of the transmitted clock rate and the sampling portion of a received bit.
    Type: Grant
    Filed: April 17, 1997
    Date of Patent: December 14, 1999
    Assignee: ITT Manufacturing Enterprises Inc.
    Inventors: Gary Vincent Blois, Joseph Michael Fine, Marvin A. Epstein
  • Patent number: 5959968
    Abstract: A port aggregation protocol (PAGP) dynamically aggregates redundant links between two neighboring devices in a computer network through the exchange of aggregation protocol data unit (AGPDU) frames between the two devices. Each AGPDU frame contains a unique identifier corresponding to the device sourcing the frame and a port number corresponding to the port through which the frame is forwarded. The exchange of AGPDU frames and the information contained therein allows the neighboring devices to identify those ports corresponding to the redundant links. Each device then dynamically aggregates its ports corresponding to the redundant links into a logical aggregation port (agport) which appears as a single, high-bandwidth port or interface to other processes executing on the device.
    Type: Grant
    Filed: July 30, 1997
    Date of Patent: September 28, 1999
    Assignee: Cisco Systems, Inc.
    Inventors: Hon Wah Chin, Michael Fine, Norman W. Finn, Richard J. Hausman
  • Patent number: 5743859
    Abstract: A signal management system is disclosed which integrates a patient switching box and an amplification unit into a single compact enclosure sufficiently small to reside by the patient table in an operating unit set up for electrophysiology procedures. The system includes a front panel designed to accept standard ECG leads, a plurality of intracardiac leads, including leads available for stimulation and/or lesion generation, and a plurality of pressure channels. The front panel also includes a touch screen display to allow quick assignments of labels to each of the ECG or intracardiac leads and the pressure channels. The system includes an onboard microprocessor which allows any operation performed on the System to be automatically updated on a remote computer processing unit if attached, and vice-versa. Digital signal processors are used in the system to perform switching operations on the electrical signals received, and to perform gain, limiting and/or filtering processes thereon.
    Type: Grant
    Filed: May 13, 1996
    Date of Patent: April 28, 1998
    Assignee: Quinton Electrophysiology Corporation
    Inventors: Harold Max Wodlinger, Richard Michael Fine
  • Patent number: 5640967
    Abstract: A versatile electrophysiology study monitoring system including an amplification system, a real time display monitor and a chart recorder as well as an optional data management and analysis system wherein the display monitor and chart recorder are controllable directly from the amplification system which may be positioned at the bedside of the patient to provide a portable system which may be used at the bedside of the patient or in the electrophysiology laboratory and which also includes a 32 channel display of physiological data and user settable filter settings for high and low pass filters.
    Type: Grant
    Filed: March 16, 1995
    Date of Patent: June 24, 1997
    Assignee: Quinton Electrophysiology Corporation
    Inventors: Ian Michael Fine, Peter Leigh Bartlett, Harold Max Wodlinger, Randy Au Coin
  • Patent number: 5313467
    Abstract: An integrated communications link in a communications network that is provided with apparatus which allows dynamic allocability of bandwidth among a plurality of channels. At least three different types of information can be carried on these channels, and the bandwidth of these channels are dynamic so that it can be changed according to a determinable scheme. The link also sends error control information with a message that informs the receiver how the bandwidth is to be allocated, this error control information providing an extremely high level of assurance that the receiver of the information will know how the received information is to be allocated.
    Type: Grant
    Filed: December 2, 1992
    Date of Patent: May 17, 1994
    Assignee: Digital Equipment Corporation
    Inventors: George Varghese, Richard L. Szmauz, Andrew J. Smith, Michael Fine
  • Patent number: 4894846
    Abstract: A method for maintaining a correct time in a distributed processing system involves clerk nodes maintaining their local clocks by requesting time intervals from server nodes, and server nodes maintaining their local clocks either by requesting time intervals from other server nodes or by receiving time information from an outside source. Server nodes also provide time intervals to requesting clerk nodes and requesting server nodes with such a method. System time is always increasing and monotonic and faulty servers are detected periodically.
    Type: Grant
    Filed: June 30, 1988
    Date of Patent: January 16, 1990
    Assignee: Digital Equipment Corporation
    Inventor: Michael Fine