Patents by Inventor Michael George Ingoldby

Michael George Ingoldby has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10792224
    Abstract: A portable pill dispenser is disclosed herein. The portable pill dispenser includes a container configured to house at least one pill therein. The container is attachable to a housing, which comprises a dispensing opening. A dispensing mechanism, a ramp, and a control panel are disposed within the housing. The dispensing mechanism is configured to dispense the at least one pill from the container to the dispensing opening. The ramp is configured to direct the at least one pill to the dispensing mechanism. A verification mechanism is disposed about the housing. The verification mechanism is configured to activate the dispensing mechanism. The control panel is in electrical communication with the dispensing mechanism and the verification mechanism.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: October 6, 2020
    Assignee: Intent Solutions, Inc.
    Inventors: Ashley B. Hancock, Louis F. Malice, Jr., Michael A. Fisher, Patrick W. Strane, Michael J. Glatzer, Michael George Ingoldby, Andrew Scott Meadows, Christopher Thomas Crowley
  • Publication number: 20160287480
    Abstract: A portable pill dispenser is disclosed herein. The portable pill dispenser includes a container configured to house at least one pill therein. The container is attachable to a housing, which comprises a dispensing opening. A dispensing mechanism, a ramp, and a control panel are disposed within the housing. The dispensing mechanism is configured to dispense the at least one pill from the container to the dispensing opening. The ramp is configured to direct the at least one pill to the dispensing mechanism. A verification mechanism is disposed about the housing. The verification mechanism is configured to activate the dispensing mechanism. The control panel is in electrical communication with the dispensing mechanism and the verification mechanism.
    Type: Application
    Filed: March 28, 2016
    Publication date: October 6, 2016
    Inventors: Ashley B. Hancock, Louis F. Malice, JR., Michael A. Fisher, Patrick W. Strane, Michael J. Glatzer, Michael George Ingoldby, Andrew Scott Meadows, Christopher Thomas Crowley
  • Patent number: 7590965
    Abstract: Methods of generating a PLD design implementation according to a design architecture tailored to specified requirements. A hardware description language (HDL) description for the PLD design includes at least one parameter value for the PLD design that will affect the preferred implementation of the design. This parameter value is passed to a high-level language (HLL) function, which is used to determine a tailored design architecture in accordance with the specified needs of the target application. The HLL function returns data specifying the tailored design architecture. This data is used in generating an implementation of the PLD design that follows the constraints imposed by the tailored design architecture. The result can be, for example, a logic gate representation of the PLD design, a netlist of the design, or a bitstream implementing the design in a target PLD.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: September 15, 2009
    Assignee: Xilinx, Inc.
    Inventors: Michael George Ingoldby, James E. Ogden, Jeffrey C. Ward, Stacey Secatch, Restu I. Ismail, Thomas E. Fischaber
  • Patent number: 7506298
    Abstract: Computer-implemented methods of mapping a logical representation of a memory to physical memory, e.g., in a programmable logic device (PLD). The logical representation of the memory is input into the computer, which generates an initial solution (e.g., a column-based solution) for the memory. In a column-based solution, the primitives are arranged such that each column includes only one type of primitive. The column-based solution generated in this step uses the minimum number of primitives attainable by a column-based approach. The column-based solution is then modified to reduce multiplexing, e.g., by replacing two primitives that are cascaded in depth with two primitives that are cascaded in width. In some embodiments, the total number of primitives can be reduced by the modification. The resulting physical representation of the memory is then output, and can be utilized, if desired, to create an implementation of the memory targeted to a PLD.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: March 17, 2009
    Assignee: Xilinx, Inc.
    Inventors: Michael George Ingoldby, James E. Ogden, Stacey Secatch
  • Patent number: 7404120
    Abstract: A method of verifying event handling for a device under test comprised of hardware description language logic within a verification environment can include, for each trigger specified by the verification environment, creating an associated thread within the verification environment. The method also can include defining a time span during which event handling within a device under test is to be performed responsive to each trigger and determining whether event handling for each trigger is performed within the time span associated with that trigger. Event handling for each trigger can be monitored by the thread associated with that trigger. The method further can include indicating triggers that were not handled by the device under test.
    Type: Grant
    Filed: August 10, 2005
    Date of Patent: July 22, 2008
    Assignee: Xilinx, Inc.
    Inventor: Michael George Ingoldby