Patents by Inventor Michael George Todd

Michael George Todd has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6740246
    Abstract: A method for making multi-layer electronic circuit boards 64 having “blind” type apertures 28, 30 which may be selectively and electrically grounded and further having selectively formed air bridges and/or crossover circuits 45, 46.
    Type: Grant
    Filed: April 17, 2001
    Date of Patent: May 25, 2004
    Assignee: Visteon Global Tech., Inc.
    Inventors: Andrew Zachary Glovatsky, Robert Edward Belke, Marc Alan Straub, Michael George Todd
  • Patent number: 6555015
    Abstract: Method of manufacturing a multi-layer printed circuit board adapted for reduce interfacial sheer stresses includes a laminate substrate having a top layer forming a first major surface, a middle layer having a predetermined thickness and a bottom layer forming a second major surface opposed to the first major surface. Etch resists are disposed on the first and second surfaces corresponding to reverse images of desired conductor patterns. The first and second surfaces are thereafter etched and the photoresist removed. The laminate substrate is secured via a low modules adhesive layer to a major surface of a base. The middle layer of the laminate substrate is thereafter selectively etched so as to isolate selected portions of the first and second surfaces and to define inner connect regions therebetween having a height equal to the predetermined thickness.
    Type: Grant
    Filed: November 9, 2000
    Date of Patent: April 29, 2003
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Daniel Phillip Dailey, Robert Edward Belke, Jr., Jay DeAvis Baker, Achyuta Achari, Myron Lemecha, Michael George Todd
  • Patent number: 6528736
    Abstract: Method of manufacturing a multi-layer printed circuit board adapted for reduce interfacial sheer stresses includes a laminate substrate having a top layer forming a first major surface, a middle layer having a predetermined thickness and a bottom layer forming a second major surface opposed to the first major surface. Etch resists are disposed on the first and second surfaces corresponding to reverse images of desired conductor patterns. The first and second surfaces are thereafter etched and the photoresist removed. The laminate substrate is secured via a low modules adhesive layer to a major surface of a base. The middle layer of the laminate substrate is thereafter selectively etched so as to isolate selected portions of the first and second surfaces and to define inner connect regions therebetween having a height equal to the predetermined thickness.
    Type: Grant
    Filed: January 21, 1997
    Date of Patent: March 4, 2003
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Daniel Phillip Dailey, Robert Edward Belke, Jr., Jay DeAvis Baker, Achyuta Achari, Myron Lemecha, Michael George Todd
  • Publication number: 20020148642
    Abstract: A method for making multi-layer electronic circuit boards 64 having “blind” type apertures 28, 30 which may be selectively and electrically grounded and further having selectively formed air bridges and/or crossover circuits 45, 46.
    Type: Application
    Filed: April 17, 2001
    Publication date: October 17, 2002
    Inventors: Andrew Zachary Glovatsky, Robert Edward Belke, Marc Alan Straub, Michael George Todd
  • Patent number: 6326241
    Abstract: A solderless method for assembling a semiconductor electronic flip-chip device to an electrical interconnecting substrate including the steps of forming a plurality of raised electrical contacts and plurality of contact pads. The pads correspond in number and physical location with the electrical contacts. The pads and contact mate when brought together. A quantity of plastic material is interposed between the electrical device and substrate. The plastic material is heated so that it softens and flows. The electronic device and substrate are urged together. The urging step displaces the molten plastic material from between the contacts and pads. The contacts and pads are jointed directly without any adhesive, solder or conducive filler therebetween to electrically interconnect the electronic device and substrate. The plastic material is allowed to cool whereby the electronic device and substrate are adhesively bonded together and electrically interconnected.
    Type: Grant
    Filed: December 29, 1997
    Date of Patent: December 4, 2001
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Robert Edward Belke, Jr., Brian John Hayden, Cuong Van Pham, Rosa Lynda Nuno, Michael George Todd
  • Patent number: 6197145
    Abstract: A method of attaching a flexible plastic film having electronic circuit traces to a rigid plastic substrate. The film and substrate are made from different incompatible plastic materials that do not bond to one another and have different CTE. The use of different or incompatible materials is useful where the properties of the backing structure and film are selected to achieve different results. For example, the flexible film may be selected from a material that provides a high melting point to withstand soldering while the backing material is selected from a low-cost and light weight plastic material that has a lower melting point. The film has conductive traces on at least one surface thereof and a backing surface. A heat activated adhesive is applied to the backing surface. The film is placed within an open injection mold and the mold is closed. A hot plastic resin is injected into the mold adjacent the adhesive.
    Type: Grant
    Filed: August 17, 1998
    Date of Patent: March 6, 2001
    Assignee: Ford Motor Company
    Inventors: Michael George Todd, Rexanne M. Coyner, Andrew Zachary Glovatsky, Daniel Phillip Dailey, Robert Edward Belke
  • Patent number: 6100178
    Abstract: A three-dimensional multi-layer electronic device and method for manufacturing same, wherein the device comprises a three-dimensional substrate including a conductive trace on at least one surface of the substrate, a thin layer of dielectric material substantially covering a desired portion of the conductive trace(s) on the substrate, the dielectric layer including vias at selected locations, and applying a coating of conductive material on the dielectric layer and in the vias, and defining a conductive trace in the material to thereby form a multi-layer, interconnected three-dimensional electronic device. Additional layers of dielectric material and conductive traces may be similarly applied to create the desired number of circuit layers. Molded-in structural features, and/or vias may be defined in the appropriate layers to accommodate the attachment and/or interconnection of other electronic devices to the device.
    Type: Grant
    Filed: February 28, 1997
    Date of Patent: August 8, 2000
    Assignee: Ford Motor Company
    Inventors: Michael George Todd, Andrew Zachary Glovatsky, Peter Joseph Sinkunas
  • Patent number: 5986884
    Abstract: There is disclosed herein a printed circuit board, one embodiment of which comprises: a dielectric substrate 10; a solid metallic heat sink 16 attached to or embedded within the substrate; a cavity 18 formed generally in the substrate, wherein at least one wall 20 of the cavity is defined by a surface 17 of the heat sink 16; a component mounting pad 14 disposed on the substrate proximate the cavity; a predetermined volume of electrically insulative liquid 22 contained within the cavity; and a thermally conductive member 24 embedded within the substrate, the member 24 being in direct thermal contact with each of the mounting pad 14 and the liquid 22.
    Type: Grant
    Filed: July 13, 1998
    Date of Patent: November 16, 1999
    Assignee: Ford Motor Company
    Inventors: Vivek Amir Jairazbhoy, Michael George Todd, Prathap Amerwai Reddy
  • Patent number: 5938455
    Abstract: A circuit board assembly is disclosed comprising a pair of three-dimensional substrates having integral, metallized connectors. The connector of the first substrate protrudes therefrom, while the connector of the second substrate is recessed therein. The geometries of the protruding connector and the recessed connector are different such that they deform when assembled to provide an electrical connection and a detachable physical connection. In one embodiment, the recessed connector has a parabolic cross-section and the protruding connector has a circular cross-section. A flexible molded edge connector for the circuit board assembly is also disclosed.
    Type: Grant
    Filed: May 15, 1996
    Date of Patent: August 17, 1999
    Assignee: Ford Motor Company
    Inventors: Andrew Zachary Glovatsky, Michael George Todd, Peter Joseph Sinkunas, Myron Lemecha
  • Patent number: 5929375
    Abstract: A circuit board includes a substantially non-conductive substrate and first and second rigid sheets. The first sheet forms a grid pattern substantially encapsulated by the substrate, and a portion of the first sheet extends beyond a boundary of the substrate to form a first interconnection terminal. The second sheet is also substantially encapsulated by the substrate and has a portion which extends beyond the boundary of the substrate to form a second interconnection terminal. The second sheet acts as an electromagnetic interference shield, and also has a coefficient of thermal expansion less than a coefficient of thermal expansion of the substrate.
    Type: Grant
    Filed: May 10, 1996
    Date of Patent: July 27, 1999
    Assignee: Ford Motor Company
    Inventors: Andrew Zachary Glovatsky, Michael George Todd, Richard Keith McMillan, II
  • Patent number: 5925298
    Abstract: A method and apparatus for forming a rigid circuit board has a circuit board with a reduced thickness in a bend region. The bend region may have several layers of laminate and conductive material. The circuit board is heated to the glass transition temperature which allows the circuit board to become flexible. The apparatus has a clamping member and a stationary member. The clamping member uses a shape memory alloy actuator with a transition temperature about the same as the glass transition temperature of the laminate. The actuator is used to form the bend region to a predetermined shape around the stationary member. When the circuit board is cooled, the circuit board again becomes rigid in its predetermined shape.
    Type: Grant
    Filed: June 26, 1995
    Date of Patent: July 20, 1999
    Assignee: Ford Motor Company
    Inventors: Bethany Joy Walles, Michael George Todd, Robert Edward Belke, Jr.
  • Patent number: 5914534
    Abstract: A three-dimensional multi-layer molded electronic device and method for manufacturing same, wherein the device comprises at least two molded, three-dimensional substrates having mating surfaces, each substrate including a layer of patterned conductive material on at least one surface and electrically conductive vias at selected locations of the substrate for interconnection of the conductive layers, wherein the substrates are electrically joined at their mating surfaces and the circuit layers are aligned and interconnected to form a multi-layer, three-dimensional circuit which may include molded-in structural features.
    Type: Grant
    Filed: May 3, 1996
    Date of Patent: June 22, 1999
    Assignee: Ford Motor Company
    Inventors: Michael George Todd, Peter Joseph Sinkunas, Andrew Zachary Glovatsky
  • Patent number: 5909839
    Abstract: A method is provided for applying a fluid to a plurality of locations on a non-planar substrate. The apparatus used includes a movable base and an array of pins connected to the base. Each pin has a distal end which is vertically movable with respect to the base independently of the rest of the array of pins. Each distal end is adapted to transfer fluid to a location on the substrate by having a greater affinity for the fluid than the fluid has for itself and a lesser affinity for the fluid than the fluid has for the substrate. Accordingly, the distal ends may be dipped in the fluid and moved into contact with the substrate such that the distal ends may collapse toward the base as the distal ends engage the substrate to facilitate further movement of the base toward the substrate for application of fluid to each of the plurality of locations.
    Type: Grant
    Filed: May 15, 1997
    Date of Patent: June 8, 1999
    Assignee: Ford Motor Company
    Inventors: Robert Edward Belke, Jr., John Trublowski, Michael George Todd
  • Patent number: 5909012
    Abstract: A gas assisted injection molded part includes internal cavities extending between two surfaces of the part. The cavities are plated for electrical conductivity after a surface cleaning and etching process. The part may be an automobile instrument panel wherein the internal cavities are plated to create a series of "bus" conductor lines. These lines carry power, ground and/or electrical signals over relatively large distances, allowing other components to attach at points along the structure eliminating the need for discrete wiring and wire harness interconnect assemblies.
    Type: Grant
    Filed: October 21, 1996
    Date of Patent: June 1, 1999
    Assignee: Ford Motor Company
    Inventors: Michael George Todd, Charles Frederick Schweitzer, Robert Edward Belke, Jr., Tianmin Zheng
  • Patent number: 5882954
    Abstract: There is disclosed herein a method for adhering metallizations to a substrate, comprising the steps of: (1) providing a substrate having a first surface; (2) applying a coating atop the first surface, such that the coating has a second surface bonded to the first surface, and a third surface generally conforming with the second surface; (3) etching away material from the third surface, so as to roughen and form pits in the third surface; and (4) attaching a metallization to the pits in the third surface by plating, sputtering, or similar means.
    Type: Grant
    Filed: October 6, 1997
    Date of Patent: March 16, 1999
    Assignee: Ford Motor Company
    Inventors: Ram Singh Raghava, Andrew Z. Glovatsky, Jay DeAvis Baker, Michael George Todd
  • Patent number: 5878487
    Abstract: A method of supporting an electrical circuit on an electrically insulative base substrate comprises embossing a first circuit pattern on the substrate, and plating or etching a second circuit pattern over the first circuit pattern such that the first and second circuit patterns are in physical contact with each other for electrical communication therebetween. Plated through-holes are provided for facilitating support of a twisted pair of electrical conductors on a base substrate.
    Type: Grant
    Filed: September 19, 1996
    Date of Patent: March 9, 1999
    Assignee: Ford Motor Company
    Inventors: Richard Keith McMillan, II, Andrew Zachary Glovatsky, Michael George Todd
  • Patent number: 5837609
    Abstract: A fully additive method of applying a circuit pattern to a three-dimensional, nonconductive part comprises: pretreating the surface of the part; pad-printing a surface catalyst in a solvent carrier onto the surface in the shape of a desired circuit pattern; and applying an electroless copper deposit onto the surface catalyst, thereby providing a copper layer on the surface in the desired circuit pattern shape.
    Type: Grant
    Filed: January 16, 1997
    Date of Patent: November 17, 1998
    Assignee: Ford Motor Company
    Inventors: Michael George Todd, Robert Edward Belke, Jr., Andrew Zachary Glovatsky
  • Patent number: 5830389
    Abstract: Electrically conductive adhesive compositions and methods for the preparation and use thereof, in which a solder powder, a chemically protected cross-linking agent with fluxing properties and a reactive monomer or polymer are the principal components. Depending upon the intended end use, the compositions comprise three or more of the following: a relatively high melting metal powder; solder powder; the active cross-linking agent which also serves as a fluxing agent; a resin; and a reactive monomer or polymer. The compositions are useful as improved conductive adhesives, such as for attaching electrical components to electrical circuits; the compositions comprising metal powder are ideally suited for creating the conductive paths on printed circuits. The compositions for forming conductive paths may first be applied to a substrate in the desired pattern of an electrical circuit, and then heated to cure it.
    Type: Grant
    Filed: October 17, 1994
    Date of Patent: November 3, 1998
    Assignee: Toranaga Technologies, Inc.
    Inventors: Miguel Albert Capote, Michael George Todd, Nicholas John Manesis, Hugh P. Craig
  • Patent number: 5715140
    Abstract: An apparatus is provided for securing electronic devices in a vehicle. A ventilation duct is provided beneath the instrument panel for conveying air in the vehicle. The ventilation duct includes an outer surface. An overlay substrate is laid upon and secured against the outer surface or acts as the wall of the duct, and is adapted for carrying electronic devices thereon. This design improves packaging efficiency within the vehicle. This invention can also be applied to other automotive applications such as on door panels, instrument panels and package trays.
    Type: Grant
    Filed: May 3, 1996
    Date of Patent: February 3, 1998
    Assignee: Ford Motor Company
    Inventors: Peter Joseph Sinkunas, Andrew Zachary Glovatsky, Michael George Todd, Myron Lemecha
  • Patent number: 5706170
    Abstract: An apparatus is provided for both conveying air and for housing electronic devices in a vehicle. The apparatus comprises a molded ventilation duct with a parallel housing secured to the duct for housing electronic devices. The housing is molded integrally with the duct and metallized with electronic circuitry and devices. This design improves packaging efficiency underneath the vehicle instrument panel.
    Type: Grant
    Filed: May 3, 1996
    Date of Patent: January 6, 1998
    Assignee: Ford Motor Company
    Inventors: Andrew Zachary Glovatsky, Michael George Todd, Peter Joseph Sinkunas