Patents by Inventor Michael Guang-Tzong Lee

Michael Guang-Tzong Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6428942
    Abstract: Methods for forming multilayer circuit structures are disclosed. In some embodiments, conductive layers, dielectric layers and conductive posts can be formed on both sides of a circuitized core structure. The conductive posts are disposed in the dielectric layers and can be stacked to form a generally vertical conduction pathway which passes at least partially through a multilayer circuit structure. The formed multilayer circuit structures can occupy less space than corresponding multilayer circuit structures with stacked via structures.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: August 6, 2002
    Assignee: Fujitsu Limited
    Inventors: Hunt Hang Jiang, Yasuhito Takahashi, Michael Guang-Tzong Lee, Wen-chou Vincent Wang, Mark McCormack
  • Patent number: 6187652
    Abstract: A method of fabricating a multi-layer interconnected substrate structure. The inventive method includes forming a multi-layer structure from multiple, pre-fabricated power and/or signal substrates which are laminated together. A drill is then used to form a via through the surface of a ring-type pad down to a desired depth in the multi-layer structure. The via hole is cleaned and then filled with a conductive material. The via so formed between two or more substrates is self-aligned by using the ring pad(s). This contributes to an increased signal routing density compared to conventional methods.
    Type: Grant
    Filed: September 14, 1998
    Date of Patent: February 13, 2001
    Assignee: Fujitsu Limited
    Inventors: William T. Chou, Solomon I. Beilin, Michael Guang-Tzong Lee, Michael G. Peters, Wen-Chou Vincent Wang
  • Patent number: 6163957
    Abstract: Multilayer circuit lamination methods and circuit layer structures are disclosed which enable one to manufacture high-density multichip module boards and the like at lower cost, with higher yield, with higher signal densities, and with fewer processing steps.
    Type: Grant
    Filed: November 13, 1998
    Date of Patent: December 26, 2000
    Assignee: Fujitsu Limited
    Inventors: Hunt Hang Jiang, Thomas Massingill, Mark Thomas McCormack, Michael Guang-Tzong Lee
  • Patent number: 6050832
    Abstract: An interposer structure permits a differential transverse displacement of contact pads on opposite sides of the interposer to reduce thermal stresses when the interposer is bonded to contact pads of a chip and a substrate with different thermal coefficients of expansion. The effective elasticity of the interposer between top and bottom contact pads of the interposer is facilitated by perforations which define flap-like regions. A flexible trace couples top contact pads to bottom contact pads through a via while permitting substantial transverse relative displacement of the top and bottom contact pads in flap-like regions.
    Type: Grant
    Filed: August 7, 1998
    Date of Patent: April 18, 2000
    Assignee: Fujitsu Limited
    Inventors: Michael Guang-Tzong Lee, Solomon I. Beilin, Wen-chou Vincent Wang