Patents by Inventor Michael H. Hartung

Michael H. Hartung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4500954
    Abstract: A storage hierarchy has a caching buffer and a backing store; the backing store preferably having disk-type data-storage apparatus. A directory indicates data stored in the caching buffer. Upon a data-storage access, read or write, within a series of such accesses, resulting in a cache miss, all subsequent data storage accesses in the series are made to the backing store to the exclusion of the caching buffer even though the caching buffer has storage space allocated for such a data transfer. Selected limits are placed on the series to the backing store, such as receiving on end of series (end of command chain) indication from a using unit, crossing DASD cylinder boundaries, receiving an out of bounds address or receiving certain device oriented commands.
    Type: Grant
    Filed: October 15, 1981
    Date of Patent: February 19, 1985
    Assignee: International Business Machines Corporation
    Inventors: Alan H. Duke, Michael H. Hartung, Frederick J. Marschner, Kenneth P. Nolan
  • Patent number: 4466059
    Abstract: A storage hierarchy has a backing store and a caching buffer store. During a series of accesses to the hierarchy by a user, writing data to the hierarchy results in data being selectively removed from the buffer store. Space in said buffer store not being allocated to data being written results in such data being written to the backing store to the exclusion of the buffer store. Removal of data increases the probability of writing data to the backing store. In a preferred implementation, the backing store is one or more disk type data storage apparatus and the buffer store is an electronic random access memory.
    Type: Grant
    Filed: October 15, 1981
    Date of Patent: August 14, 1984
    Assignee: International Business Machines Corporation
    Inventors: Arlon L. Bastian, Marc E. Goldfeder, Michael H. Hartung
  • Patent number: 4445176
    Abstract: Secondary storage subsystems exchange messages and data with host data processing systems and also forward messages between host systems. Host systems thereby communicate with each other in addition to having access to data in subsystem storage. Access to subsystem storage is initiated by a "request" sent from a host to the subsystem. Each request is a message containing an array of one or more commands, each command specifying a transfer of data or a control function to be performed by the subsystem. A subsystem may process more than one request at a time. It also may process the commands in a request in an arbitrary sequence suited to the availability of subsystem resources and data links to host systems. After all commands in a request have been processed the subsystem transmits an associated "completion" message to the host system which originated the request. The completion message indicates the status of completion or abnormal termination of each command in the associated request.
    Type: Grant
    Filed: December 28, 1979
    Date of Patent: April 24, 1984
    Assignee: International Business Machines Corporation
    Inventors: John L. Burk, Roger L. Cormier, Michael H. Hartung, Ray A. Larner, Donald J. Lucas, Kenneth R. Lynch, Brian B. Moore, Howard L. Page, David H. Wansor, Carl Zeitler, Jr.
  • Patent number: 4438512
    Abstract: In a data storage system employing sequential data transfers for blocks of data bytes, an address offset is induced in the addressing mechanism such that each block transfer requires loading the address mechanism with an address of a block to be accessed. Address offset is preferably induced by inserting a blank register between adjacent blocks.
    Type: Grant
    Filed: September 8, 1981
    Date of Patent: March 20, 1984
    Assignee: International Business Machines Corporation
    Inventors: Michael H. Hartung, Richard E. Rieck, Gerald E. Tayler
  • Patent number: 4430701
    Abstract: A plurality of addressable data storage devices are selectively directly accessed or accessed via a cache memory. Access via the cache memory uses one of a plurality of logical addresses; each of the data storage devices is represented by a plurality of the logical addresses. Each of the data storage devices can be reserved for direct access; such reservation does not apply to device accesses via the cache. Accesses to the devices are queued on a device basis.
    Type: Grant
    Filed: August 3, 1981
    Date of Patent: February 7, 1984
    Assignee: International Business Machines Corporation
    Inventors: John H. Christian, Michael H. Hartung, Arthur H. Nolta, David G. Reed, Richard E. Rieck, Gerald E. Tayler, John S. Williams
  • Patent number: 4429363
    Abstract: In a storage hierarchy, promotion of data from a backing store to a caching buffer store is restricted based upon status of the cache and activity of a last storage reference. Observed writing activity selectively inhibits data promotion. Data promotion occurs after completion of a series of storage access requests. A peripheral data storage system is described.
    Type: Grant
    Filed: October 15, 1981
    Date of Patent: January 31, 1984
    Assignee: International Business Machines Corporation
    Inventors: Alan H. Duke, Michael H. Hartung, Frederick J. Marschner