Abstract: Systems and processes for accessing acceleration data may include an accelerometer coupled to a nonvolatile memory. The nonvolatile memory may be coupled to a processor. Acceleration data may be obtained from the accelerometer via a bus coupling the nonvolatile memory to the accelerometer. Acceleration data may be sent from the nonvolatile memory to a processor. One or more operations may be performed based on the acceleration data.

Abstract: Systems and methods involve the use of a flash memory device having multiple flash memory cells. A first interface is adapted to receive power for selectively programming each flash memory cell. A second interface is adapted to receive power supplied to logic level circuitry to perform the selection of flash memory cells to be supplied with power from the first input during a write operation.

Abstract: Systems and processes may be used to retrieve metadata from a nonvolatile memory of a portable device and transmit the retrieved metadata to an external host. Metadata may be analyzed using the external host and/or at least a portion of the metadata may be modified based on the analysis. Modified metadata may be transmitted from the external host to a memory controller of the host.

Abstract: Systems and techniques for accessing a memory, such as a NAND or NOR flash memory, involve storing an operating application for a computing device in a first memory and storing a driver containing software operable to control the first memory in a second memory that is independently accessible from the first memory. By storing the driver in a second memory that is independently accessible from the first memory, changes to the driver and/or the first memory can be made without altering the operating application.

Abstract: A system and method, including computer software, allows reading data from a flash memory cell. Voltages from a group of memory cells are detected. The group of memory cells have associated metadata for error detection, and each memory cell stores a voltage representing a data value selected from multiple possible data values. Each possible data value corresponds to one range of multiple non-overlapping ranges of analog voltages. Memory cells having uncertain data values are identified based on the detected voltages. Alternative data values for the memory cells having the uncertain data values are determined, and a combination of alternative data values is selected. An error detection test is performed using the metadata associated with the multiple memory cells and the selected combination of alternative data values.

Abstract: Systems and methods, including computer software, for reading data from a flash memory cell involve detecting voltages from a group of memory cells. The group of memory cells have associated metadata for error detection, and each memory cell stores a voltage representing a data value selected from a plurality of possible data values. Each possible data value corresponds to one range of multiple non-overlapping ranges of analog voltages. Memory cells having uncertain data values are identified based on the detected voltages. Alternative data values for the memory cells having the uncertain data values are determined. A combination of alternative data values is selected, and an error detection test is performed using the metadata associated with the memory cells and the selected combination of alternative data values.

Abstract: Systems and processes for accessing acceleration data may include an accelerometer coupled to a nonvolatile memory. The nonvolatile memory may be coupled to a processor. Acceleration data may be obtained from the accelerometer via a bus coupling the nonvolatile memory to the accelerometer. Acceleration data may be sent from the nonvolatile memory to a processor. One or more operations may be performed based on the acceleration data.

Abstract: Systems and processes may be implemented to receive threads of execution and assign priorities to the threads of execution. Threads of execution may include nonvolatile memory input/output threads, other input/output threads, and/or other non-input/output threads. A lower priority may be assigned to nonvolatile memory input/output threads than other input/output threads. An algorithm may determine an order of execution of the threads of execution. An order of execution may be at least partially based on assigned priorities.

Abstract: Systems and processes may include a memory coupled to a memory controller. Command signals for performing memory access operations may be received. Attributes of the command signals, such as type, time lapsed since receipt, and relatedness to other command signals, may be determined. Command signals may be sequenced in a sequence of execution based on the attributes. Command signals may be executed in the sequence of execution.

Abstract: Systems and techniques for accessing a memory, such as a NAND or NOR flash memory, involve storing an operating application for a computing device in a first memory and storing a driver containing software operable to control the first memory in a second memory that is independently accessible from the first memory. By storing the driver in a second memory that is independently accessible from the first memory, changes to the driver and/or the first memory can be made without altering the operating application.

Abstract: Systems and processes may be used to retrieve metadata from a nonvolatile memory of a portable device and transmit the retrieved metadata to an external host. Metadata may be analyzed using the external host and/or at least a portion of the metadata may be modified based on the analysis. Modified metadata may be transmitted from the external host to a memory controller of the host.

Abstract: Systems and processes may include a first memory and a second memory. A driver and/or an application may be stored in the first memory. Flash memory type data of the first memory may be stored in the second memory. The driver may control the first memory at least partially based on the flash memory type data. The first memory may be exchanged for a third memory. The driver may be stored on the third memory. The flash memory type data for the third memory may be stored on the second memory.

Abstract: Systems and methods, including computer software for performing operations enable interleaving of charging operations in a charging pump. A first charge pump is charged to a predetermined level, and a first operation is performed using a charge stored in the first charge pump after it reaches the predetermined level. A second charge pump is charged during a time that overlaps with performing the first operation. A second operation is performed using a charge stored in the second charge pump as a result of charging the second charge pump.

Abstract: Articles and associated methods and systems relate to disabling defective flash memory dies in a device containing multiple flash memory dies. Packages containing multiple flash memory dies may be labeled to indicate a flash memory data storage capacity based on the flash memory dies that are not disabled. Various disabling methods may be applied at the die level, package level, and/or board level.

Abstract: A system and method for storing data uses multiple flash memory dies. Each flash memory die includes multiple flash memory cells. A charge pump is adapted to supply charge at a predetermined voltage to each flash memory die of the flash memory dies, and an interface is adapted to receive instructions for controlling the charge pump.

Abstract: Systems and processes may be implemented to receive threads of execution and assign priorities to the threads of execution. Threads of execution may include nonvolatile memory input/output threads, other input/output threads, and/or other non-input/output threads. A lower priority may be assigned to nonvolatile memory input/output threads than other input/output threads. An algorithm may determine an order of execution of the threads of execution. An order of execution may be at least partially based on assigned priorities.

Abstract: A system and method for storing data uses multiple flash memory dies. Each flash memory die includes multiple flash memory cells. A charge pump is adapted to supply charge at a predetermined voltage to each flash memory die of the flash memory dies, and an interface is adapted to receive instructions for controlling the charge pump.

Abstract: Systems and techniques for accessing a memory, such as a NAND or NOR flash memory, involve storing an operating application for a computing device in a first memory and storing a driver containing software operable to control the first memory in a second memory that is independently accessible from the first memory. By storing the driver in a second memory that is independently accessible from the first memory, changes to the driver and/or the first memory can be made without altering the operating application.

Abstract: Systems and processes may include a memory coupled to a memory controller. Command signals for performing memory access operations may be received. Attributes of the command signals, such as type, time lapsed since receipt, and relatedness to other command signals, may be determined. Command signals may be sequenced in a sequence of execution based on the attributes. Command signals may be executed in the sequence of execution.

Abstract: Systems and methods, including computer software for performing operations enable interleaving of charging operations in a charging pump. A first charge pump is charged to a predetermined level, and a first operation is performed using a charge stored in the first charge pump after it reaches the predetermined level. A second charge pump is charged during a time that overlaps with performing the first operation. A second operation is performed using a charge stored in the second charge pump as a result of charging the second charge pump.