Abstract: Apparatus and associated methodology involving use of a multiple-core processor. A reserved hard allocation of resources partition (HARP) dedicates physical resources for operably supporting a first processing function. The dedicated resources of the reserved HARP include a reserved physical memory that is sized in relation to data processing requirements of the first processing function. The dedicated resources of the first HARP also include a command buffer residing in the reserved physical memory. The dedicated resources of the first HARP also include a reserved physical core of the multiple core processor. The apparatus also includes a second HARP having resources that are used for operably supporting a different second processing function. The second HARP resources operably put transaction requests from the second processing function to the command buffer in the first HARP.

Abstract: A solid state switching system for use with solenoid operated control valves, especially control valves for dangerous machinery including a light screen guard fitted for personnel protection. The switching system comprises two transistors in series with the solenoid coil. A self-checking monitoring system for monitoring the state of the two switches is provided. The monitoring system has a plurality of switching elements arranged in such a way that no single electrical fault can result in an inadvertent energization of the control valve. Specifically in the event that one of the switches is off while the other is still conducting, the monitoring system inhibits switching on of the switch that is off. The monitor system verifies that no fault has occurred during any one cycle of operation which might not otherwise be apparent. Every component in the switching and monitoring circuits functions during each on/off cycle.