Abstract: The track-and-hold circuit includes a switching circuit and a plurality of storage devices. The switching circuit responsive to an input signal applies a representation of the input signal to the storage devices in a track mode and blocks a signal path between the input signal and the storage device in a hold mode such that a transition from the track mode to a hold mode causes the storage devices to store a time sample of the input signal. An acquisition glitch suppression circuit includes a replica amplifier coupled to the switching circuit that senses a differential voltage across the storage devices. A switched clamping circuit clamps inputs of the switching circuit to the sensed differential voltage in the hold mode such that the initial condition of switching transistors of the switching circuit are approximately identical prior to a hold-to-track transition to mitigate differential acquisition glitch.

Abstract: A double switched track-and-hold circuit includes an input buffer having a first switched amplifier circuit for passing an input signal in a track mode and isolating the input signal from a buffer output in a hold mode, and a track-and-hold core circuit responsive to the input buffer and having a second switched amplifier circuit for tracking the input signal in a track mode and isolating the input signal from a track-and-hold output in a hold mode. The first and second switching amplifier circuits turn off approximately simultaneously during the hold mode to provide enhanced isolation.

Abstract: A double switched track-and-hold circuit includes an input buffer having a first switched amplifier circuit for passing an input signal in a track mode and isolating the input signal from a buffer output in a hold mode, and a track-and-hold core circuit responsive to the input buffer and having a second switched amplifier circuit for tracking the input signal in a track mode and isolating the input signal from a track-and-hold output in a hold mode. The first and second switching amplifier circuits turn off approximately simultaneously during the hold mode to provide enhanced isolation.

Abstract: A method and apparatus are provided for tracking and holding a voltage. The method includes the steps of providing an external analog voltage on an input of the track and hold circuit during a tracking mode of the track and hold circuit, storing a representation of the sampled external voltage in a storage device of the track and hold circuit, blocking a signal path between the external voltage and the storage device during a holding mode of the track and hold circuit and clamping the input of the track and hold circuit to a predetermined voltage during the holding mode.

Abstract: A process for fabricating an acoustic charge transport (ACT) integrated circuit, comprises the steps of providing a semi-insulating wafer; providing an epitaxial layer with a thickness and carrier concentration appropriate for an ACT device on the semi-insulating wafer; providing at least one circuit element semiconductor layer on the surface of the epitaxial layer for construction of an integrated circuit element, the at least one semiconductor layer having a thickness substantially less than the thickness of the ACT epitaxial layer and having a carrier concentration substantially greater than the ACT epitaxial layer; removing lateral conductivity of the entire ACT epitaxial layer except in the regions associated with the at least one circuit element semiconductor layer and the ACT device in order to achieve lateral electrical isolation between the circuit element semiconductor layer and the ACT device; providing ohmic contacts on the at least one layer and on the ACT device; providing a first metal layer on

Abstract: A waveguide for surface acoustic waves comprises a substrate for supporting propagation of surface acoustic waves along a direction at a substrate velocity and a dielectric structure disposed above the substrate along the propagation direction of the surface acoustic waves. The structure includes a central portion disposed along the propagation direction, first and second intermediate portions respectively disposed along each opposed side of the central portion along the propagation direction, and first and second outer portions respectively disposed along each outer side of the first and second intermediate portions along the propagation direction. The central, intermediate and outer portions each has first, second and third intrinsic surface acoustic wave propagation velocities along the propagation direction of the surface acoustic waves, respectively and the first velocity is intermediate of the second and third velocities.

Abstract: A complementary acoustic charge transport circuit element comprises first and second buried channels. Each of the channels is comprised of a piezoelectric semiconductor and each channel has a source through which charge is injected and a drain through which charge is extracted. A transducer propagates an acoustic wave through each channel and the propagated waves transport the charge between the sources and the drains. A source and/or a drain of one channel is connected in parallel with the corresponding souce and/or drain of the other channel. The waves are complementary at the interconnected ones of the sources and/or the drains.

Abstract: A method for electrically isolating an integrated circuit element in an acoustic charge transport device comprises the steps of providing a semi-insulating substrate; providing an epitaxial layer with a thickness and carrier concentration appropriate for an ACT device; providing a circuit element semiconductor layer in the epitaxial layer for construction of an integrated circuit element, the layer having a thickness substantially less than the thickness of the epitaxial layer and having a carrier concentration substantially greater than the ACT epitaxial layer; laterally isolating the semiconductor layer from other regions of the ACT epitaxial layer; and bombarding the semiconductor layer with protons at a dose sufficient to provide significant vertical electrical isolation from underlying regions of the epitaxial layer semi-insulating with minimal detrimental effect on the electrical characteristics of the semiconductor layer.

Abstract: An acoustic charge transport device comprises a substrate with a layer disposed thereon; a channel disposed within the layer for providing a propagation path for a surface acoustic wave; a contact operably connected and disposed at one end of the channel for injecting an electronic signal into the channel; a transducer disposed at the one end of the channel for generating and propagating the surface acoustic wave through the channel; a plurality of sensing electrodes operably associated with the channel and disposed along the propagation path of the surface acoustic wave for non-destructively sensing the electronic signal; and a plurality of active buffer circuits each having an input operably connected to respective sensing electrode and an output operably connected to an output circuit.

Abstract: A method for electrically isolating an integrated circuit element in an acoustic charge transport device comprises the steps of providing a semi-insulating substrate; providing an epitaxial layer with a thickness and carrier concentration appropriate for an ACT device; providing a circuit element semiconductor layer in the epitaxial layer for construction of an integrated circuit element, the layer having a thickness substantially less than the thickness of the epitaxial layer and having a carrier concentration substantially greater than the ACT epitaxial layer; laterally isolating the semiconductor layer from other regions of the ACT epitaxial layer; and bombarding the semiconductor layer with protons at a dose sufficient to provide significant vertical electrical isolation from underlying regions of the epitaxial layer semi-insulating with minimal detrimental effect on the electrical characteristics of the semiconductor layer.

Abstract: The disclosure is directed to a method and a device for delaying an electrical signal, the method and device being useable in various signal processing applications. A buried channel is formed by disposing a portion of a layer of piezoelectric semiconductor material between confining layers. A surface acoustic wave is established in the piezoelectric semiconductor material. Majority carriers are depleted from the channel, and an electrical signal is injected into the channel. A delayed version of the electrical signal, which had been carried along by the surface acoustic wave, can then be extracted from the channel.