Patents by Inventor Michael Jayo

Michael Jayo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10784775
    Abstract: A switching converter with reduced dead-time and without reverse-recovery is disclosed. The switching converter includes a first power switch coupled to a second power switch, a mode detector and a controller. The mode detector is adapted to detect a mode of operation of the first power switch and the second power switch, and to identify a first period during which the first power switch is turned on and operates in a linear mode while the second power switch is turned off. The controller is adapted to bias the second power switch with a predetermined voltage during the first period to turn on the second power switch during a second period. In the second period the first power switch is operating in a saturation mode.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: September 22, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Hyungtaek Chang, Bryan Quinones, Michael Jayo
  • Patent number: 10498212
    Abstract: A gate drive circuit arranged to receive an input signal and provide an output signal to drive a gate of a transistor is presented. The gate drive circuit comprises a filter circuit arranged to attenuate a frequency band from the input signal when deriving the output signal from the input signal. The filter circuit contains programmable resistive elements, comprising: a first programmable resistive element arranged to adjust a low frequency gain and bandwidth of the gate drive circuit; a second programmable resistive element arranged to adjust a high frequency gain of the gate drive circuit; and a pair of programmable resistive elements arranged to adjust a driving gain of the gate drive circuit. A method of receiving an input signal and deriving an output signal from an input signal is also presented. The step of deriving an output signal comprises attenuating a frequency band from the input signal.
    Type: Grant
    Filed: July 28, 2017
    Date of Patent: December 3, 2019
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Kevin Chang, Mark Mercer, Michael Jayo
  • Publication number: 20180342941
    Abstract: A gate drive circuit arranged to receive an input signal and provide an output signal to drive a gate of a transistor is presented. The gate drive circuit comprises a filter circuit arranged to attenuate a frequency band from the input signal when deriving the output signal from the input signal. The filter circuit contains programmable resistive elements, comprising: a first programmable resistive element arranged to adjust a low frequency gain and bandwidth of the gate drive circuit; a second programmable resistive element arranged to adjust a high frequency gain of the gate drive circuit; and a pair of programmable resistive elements arranged to adjust a driving gain of the gate drive circuit. A method of receiving an input signal and deriving an output signal from an input signal is also presented. The step of deriving an output signal comprises attenuating a frequency band from the input signal.
    Type: Application
    Filed: July 28, 2017
    Publication date: November 29, 2018
    Inventors: Kevin Chang, Mark Mercer, Michael Jayo
  • Patent number: 10090763
    Abstract: A multi-level buck converter is provided with multiple control loops to regulate the output voltage across a wide duty cycle range while also regulating the flying capacitor voltage. The regulated flying capacitor voltage is exploited to drive the switch transistors that float with respect to ground.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: October 2, 2018
    Assignee: DIALOG SEMICONDUCTOR (UK) LIMITED
    Inventors: Mark Mercer, Bryan Quinones, Hyungtaek Chang, Michael Jayo