Patents by Inventor Michael Karl Gschwind

Michael Karl Gschwind has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Local Function Call Site Optimization
    Publication number: 20180113689
    Abstract: Embodiments relate to using a local entry point with an indirect call function. More specifically, an indirect call function configuration comprises a first application module having a target function of the indirect function call, a second application module with a symbolic reference to the target function of the indirect function call, and a third application module to originate an indirect function call. A compiler is provided to identify potential target functions and indicate the potential target functions in the program code. A linker can read the indication the compiler made in the program code. The linker optimizes an indirect call site if the potential target functions are defined in the same module.
    Type: Application
    Filed: October 24, 2016
    Publication date: April 26, 2018
    Applicant: International Business Machines Corporation
    Inventors: Michael Karl Gschwind, Ulrich Weigand
  • Optimized Entry Points and Local Function Call Tailoring for Function Pointers
    Publication number: 20180113693
    Abstract: Embodiments relate to optimizing an indirect call function. More specifically, an indirect call function configuration comprises a first application module having a target function of the indirect function call, a second application module with a symbolic reference to the target function of the indirect function call, and a third application module to originate an indirect function call. A compiler identifies potential target functions and indicates the potential target functions in the program code. Additionally, the compiler determines and indicates in the program code that the function pointer value resulting from a non-call reference of a function symbol is solely used to perform indirect calls in the same module. A linker can read the indication the compiler made in the program code and optimize the indirect call function.
    Type: Application
    Filed: January 31, 2017
    Publication date: April 26, 2018
    Applicant: International Business Machines Corporation
    Inventors: Michael Karl Gschwind, Ulrich Weigand
  • EXECUTING OPTIMIZED LOCAL ENTRY POINTS AND FUNCTION CALL SITES
    Publication number: 20180113698
    Abstract: Embodiments relate to optimizing an indirect call function. More specifically, an indirect call function configuration comprises a first application module having a target function of the indirect function call, a second application module with a symbolic reference to the target function of the indirect function call, and a third application module to originate an indirect function call. A compiler is provided to identify potential target functions and indicate the potential target functions in the program code. Additionally, the compiler determines and indicates in the program code that the function pointer value resulting from a non-call reference of a function symbol is solely used to perform indirect calls in the same module. A linker can read the indication the compiler made in the program code and optimize the indirect call function.
    Type: Application
    Filed: October 24, 2016
    Publication date: April 26, 2018
    Applicant: International Business Machines Corporation
    Inventors: Michael Karl Gschwind, Ulrich Weigand
  • Linking Optimized Entry Points for Local-Use-Only Function Pointers
    Publication number: 20180113692
    Abstract: Embodiments relate to using a local entry point with an indirect call function. More specifically, an indirect call function configuration comprises a first application module having a target function of the indirect function call, a second application module with a symbolic reference to the target function of the indirect function call, and a third application module to originate an indirect function call. A compiler determines and indicates, in the program code, that the function pointer value resulting from a non-call reference of a function symbol is solely used to perform indirect calls in the same module, e.g. local-use-only. A linker or loader can read the indication the compiler made in the program code. The linker or loader use the local entry point associated with the target function if the target function is defined in the same module as the reference and is local-use-only.
    Type: Application
    Filed: January 27, 2017
    Publication date: April 26, 2018
    Applicant: International Business Machines Corporation
    Inventors: Michael Karl Gschwind, Ulrich Weigand
  • Loading Optimized Local Entry Points for Local-Use-Only Function Pointers
    Publication number: 20180113695
    Abstract: Embodiments relate to using a local entry point with an indirect call function. More specifically, an indirect call function configuration comprises a first application module having a target function of the indirect function call, a second application module with a symbolic reference to the target function of the indirect function call, and a third application module to originate an indirect function call. A compiler is provided to determine and indicate in the program code that the function pointer value resulting from a non-call reference of a function symbol is solely used to perform indirect calls in the same module, e.g. local-use-only. A linker or loader can read the indication the compiler made in the program code. The linker or loader use the local entry point associated with the target function if the target function is defined in the same module as the reference and is local-use-only.
    Type: Application
    Filed: October 24, 2016
    Publication date: April 26, 2018
    Applicant: International Business Machines Corporation
    Inventors: Michael Karl Gschwind, Ulrich Weigand
  • Compiling Optimized Entry Points for Local-Use-Only Function Pointers
    Publication number: 20180113691
    Abstract: Embodiments relate to using a local entry point with an indirect call function. More specifically, an indirect call function configuration comprises a first application module having a target function of the indirect function call, a second application module with a symbolic reference to the target function of the indirect function call, and a third application module to originate an indirect function call. A compiler determines and indicates, in the program code, that the function pointer value resulting from a non-call reference of a function symbol is solely used to perform indirect calls in the same module, e.g. local-use-only. A linker or loader can read the indication the compiler made in the program code. The linker or loader use the local entry point associated with the target function if the target function is defined in the same module as the reference and is local-use-only.
    Type: Application
    Filed: January 27, 2017
    Publication date: April 26, 2018
    Applicant: International Business Machines Corporation
    Inventors: Michael Karl Gschwind, Ulrich Weigand
  • Salvaging hardware transactions
    Patent number: 9952943
    Abstract: A transactional memory system salvages a partially executed hardware transaction. A processor of the transactional memory system saves state information in a first code region of a first hardware transaction. The processor executes an about-to-fail handler, the about-to-fail handler using the saved state information to determine whether the first hardware transaction is to be salvaged or to be aborted. The processor executing the about-to-fail handler, based on the transaction being to be salvaged, uses the saved state information to determine what portion of the first hardware transaction to salvage.
    Type: Grant
    Filed: March 11, 2016
    Date of Patent: April 24, 2018
    Assignee: International Business Machines Corporation
    Inventors: Harold W. Cain, III, Michael Karl Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz
  • Executing optimized local entry points and function call sites
    Patent number: 9952884
    Abstract: Embodiments relate to optimizing an indirect call function. More specifically, an indirect call function configuration comprises a first application module having a target function of the indirect function call, a second application module with a symbolic reference to the target function of the indirect function call, and a third application module to originate an indirect function call. A compiler identifies potential target functions and indicates the potential target functions in the program code. Additionally, the compiler determines and indicates in the program code that the function pointer value resulting from a non-call reference of a function symbol is solely used to perform indirect calls in the same module. A linker can read the indication the compiler made in the program code and optimize the indirect call function.
    Type: Grant
    Filed: January 31, 2017
    Date of Patent: April 24, 2018
    Assignee: International Business Machines Corporation
    Inventors: Michael Karl Gschwind, Ulrich Weigand
  • Allowing non-cacheable loads within a transaction
    Patent number: 9952976
    Abstract: A computer allows non-cacheable loads or stores in a hardware transactional memory environment. Transactional loads or stores, by a processor, are monitored in a cache for TX conflicts. The processor accepts a request to execute a transactional execution (TX) transaction. Based on processor execution of a cacheable load or store instruction for loading or storing first memory data of the transaction, the computer can perform a cache miss operation on the cache. Based on processor execution of a non-cacheable load instruction for loading second memory data of the transaction, the computer can not-perform the cache miss operation on the cache based on a cache line associated with the second memory data being not-cached, and load an address of the second memory data into a non-cache-monitor. The TX transaction can be aborted based on the non-cache monitor detecting a memory conflict from another processor.
    Type: Grant
    Filed: September 9, 2015
    Date of Patent: April 24, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jonathan D. Bradbury, Michael Karl Gschwind, Valentina Salapura, Chung-Lung K. Shum
  • Executing optimized local entry points and function call sites
    Patent number: 9952844
    Abstract: Embodiments relate to optimizing an indirect call function. More specifically, an indirect call function configuration comprises a first application module having a target function of the indirect function call, a second application module with a symbolic reference to the target function of the indirect function call, and a third application module to originate an indirect function call. A compiler is provided to identify potential target functions and indicate the potential target functions in the program code. Additionally, the compiler determines and indicates in the program code that the function pointer value resulting from a non-call reference of a function symbol is solely used to perform indirect calls in the same module. A linker can read the indication the compiler made in the program code and optimize the indirect call function.
    Type: Grant
    Filed: October 24, 2016
    Date of Patent: April 24, 2018
    Assignee: International Business Machines Corporation
    Inventors: Michael Karl Gschwind, Ulrich Weigand
  • Hardware transaction transient conflict resolution
    Patent number: 9952804
    Abstract: In an approach for resolving terminated transactions in a transactional memory environment, a processor initiates a hardware transaction in a computing environment, wherein the hardware transaction accesses a memory location, and wherein the hardware transaction includes a transaction begin indicator and a transaction end indicator. A processor detects a conflicting access of the memory location while executing the hardware transaction. A processor aborts the hardware transaction based on the conflicting access of the memory location. Hardware determines that the conflicting access of the memory location is a transient condition. A processor reinitiates the hardware transaction.
    Type: Grant
    Filed: March 8, 2016
    Date of Patent: April 24, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jonathan D. Bradbury, Michael Karl Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum, Timothy J. Slegel
  • Hardware transaction transient conflict resolution
    Patent number: 9946494
    Abstract: In an approach for resolving terminated transactions in a transactional memory environment, a processor initiates a hardware transaction in a computing environment, wherein the hardware transaction accesses a memory location, and wherein the hardware transaction includes a transaction begin indicator and a transaction end indicator. A processor detects a conflicting access of the memory location while executing the hardware transaction. A processor aborts the hardware transaction based on the conflicting access of the memory location. Hardware determines that the conflicting access of the memory location is a transient condition. A processor reinitiates the hardware transaction.
    Type: Grant
    Filed: June 13, 2016
    Date of Patent: April 17, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jonathan D. Bradbury, Michael Karl Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum, Timothy J. Slegel
  • Instruction stream modification for memory transaction protection
    Patent number: 9940135
    Abstract: Execution of a set of instructions within a transaction is prevented. A processor identifies a first set of instructions in an instruction stream of a transaction. The first set of instructions incurs a first memory access that is not visible to the transaction and will cause the transaction to abort. The processor generates a second set of instructions that incurs a second memory access that is visible to the transaction. The second set of instructions is generated based on the first memory access and first set of instructions. The processor executes, within the transaction, the second set of instructions instead of the first set of instructions.
    Type: Grant
    Filed: June 20, 2016
    Date of Patent: April 10, 2018
    Assignee: International Business Machines Corporation
    Inventors: Fadi Y. Busaba, Michael Karl Gschwind, Maged M. Michael, Chung-Lung K. Shum, Valentina Salapura, Timothy J. Slegel
  • MULTI-SECTION GARBAGE COLLECTION
    Publication number: 20180095874
    Abstract: A method and apparatus for garbage collection is disclosed herein. The method includes performing a garbage collection process without pausing execution of a runtime environment. The method also includes executing a first CPU instruction to load a first pointer that points to a first location in a first region of memory, where the first region of memory is undergoing garbage collection. The method also includes moving a first object pointed to by the first pointer from the first location in memory to a second location in memory.
    Type: Application
    Filed: December 5, 2017
    Publication date: April 5, 2018
    Inventors: Giles R. Frazier, Michael Karl Gschwind, Younes Manton, Karl M. Taylor, Brian W. Thompto
  • Instruction stream modification for memory transaction protection
    Patent number: 9928064
    Abstract: Execution of a set of instructions within a transaction is prevented. A processor identifies a first set of instructions in an instruction stream of a transaction. The first set of instructions incurs a first memory access that is not visible to the transaction and will cause the transaction to abort. The processor generates a second set of instructions that incurs a second memory access that is visible to the transaction. The second set of instructions is generated based on the first memory access and first set of instructions. The processor executes, within the transaction, the second set of instructions instead of the first set of instructions.
    Type: Grant
    Filed: November 10, 2015
    Date of Patent: March 27, 2018
    Assignee: International Business Machines Corporation
    Inventors: Fadi Y. Busaba, Michael Karl Gschwind, Maged M. Michael, Chung-Lung K. Shum, Valentina Salapura, Timothy J. Slegel
  • Conditional inclusion of data in a transactional memory read set
    Patent number: 9928173
    Abstract: Determining, by a processor having a cache, if data in the cache is to be monitored for cache coherency conflicts in a transactional memory (TM) environment. A processor executes a TM transaction, that includes the following. Executing a memory data access instruction that accesses an operand at an operand memory address. Based on either a prefix instruction associated with the memory data access instruction, or an operand tag associated with the operand of the memory data access instruction, determining whether a cache entry having the operand is to be marked for monitoring for cache coherency conflicts while the processor is executing the transaction. Based on determining that the cache entry is to be marked for monitoring for cache coherency conflicts while the processor is executing the transaction, marking the cache entry for monitoring for conflicts.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: March 27, 2018
    Assignee: International Business Machines Corporation
    Inventors: Michael Karl Gschwind, Eric M. Schwarz, Chung-Lung K. Shum, Timothy J. Slegel
  • Transactional memory operations with read-only atomicity
    Patent number: 9921895
    Abstract: Execution of a transaction mode setting instruction causes a computer processor to be in an atomic read-only mode ignoring conflicts to certain write-sets of a transaction during transactional execution. Read-set conflicts may still cause a transactional abort. Absent any aborting, the transaction's execution may complete, by committing transactional stores to memory and updating architecture states.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: March 20, 2018
    Assignee: International Business Machines Corporation
    Inventors: Michael Karl Gschwind, Eric M. Schwarz, Chung-Lung K. Shum, Timothy J. Slegel
  • Prefetching of discontiguous storage locations in anticipation of transactional execution
    Patent number: 9921834
    Abstract: Discontiguous storage locations are prefetched by a prefetch instruction. Addresses of the discontiguous storage locations are provided by a list directly or indirectly specified by a parameter of the prefetch instruction, along with metadata and information about the list entries. Fetching of corresponding data blocks to cache lines is initiated. A processor may enter transactional execution mode and memory instructions of a program may be executed using the prefetched data blocks.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: March 20, 2018
    Assignee: International Business Machines Corporation
    Inventors: Fadi Y. Busaba, Dan F. Greiner, Michael Karl Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz, Timothy J. Slegel
  • Interprocessor memory status communication
    Patent number: 9916179
    Abstract: In a transactional memory environment including a first processor and one or more additional processors, a computer-implemented method includes, by the first processor, initializing a time record, listening for zero or more probes from the one more additional processors, responding to each probe of the zero or more probes, and logging each probe of the zero or more probes to yield a probe log. The computer-implemented method further includes, by the first processor, receiving a probe report directive and, responsive to the probe report directive, generating a probe report indication based on the probe log. The probe report indication denotes whether, since the time record, the first processor has received any of the zero or more probes. The computer-implemented method further includes ending the time record. A corresponding computer program product and computer system are also disclosed.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: March 13, 2018
    Assignee: International Business Machines Corporation
    Inventors: Michael Karl Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum, Timothy J. Slegel
  • Interprocessor memory status communication
    Patent number: 9916180
    Abstract: In a transactional memory environment including a first processor and one or more additional processors, a computer-implemented method includes, by the first processor, initializing a time record, listening for zero or more probes from the one more additional processors, responding to each probe of the zero or more probes, and logging each probe of the zero or more probes to yield a probe log. The computer-implemented method further includes, by the first processor, receiving a probe report directive and, responsive to the probe report directive, generating a probe report indication based on the probe log. The probe report indication denotes whether, since the time record, the first processor has received any of the zero or more probes. The computer-implemented method further includes ending the time record. A corresponding computer program product and computer system are also disclosed.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: March 13, 2018
    Assignee: International Business Machines Corporation
    Inventors: Michael Karl Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum, Timothy J. Slegel