Abstract: Pyrrolidine main protease inhibitors are described that are effective as antiviral compounds.

Abstract: A system for, and method of, emulating, on a non-native computer, a native environment for a visual display object file for a real time process control system and a real time process control system employing the emulator. The visual display object file contains a drawing command, an address pointer for communicating data with the real time process control system and a rule for interpreting data received from a touch-sensitive screen.

Abstract: A module of a distributed process control system has a prior art kernel submodule, a peripheral submodule, and an interface circuit to provide for communications between the two submodules. The kernel submodule communicates with the interface circuit over a module BUS which includes a data BUS and an address BUS. The peripheral submodule communicates with the interface circuit over a peripheral component interface (PCI) BUS, a single thirty two bit BUS which is incompatible with the module BUS. The interface circuit permits such communications between the two submodules without requiring any hardware or software changes to the kernel submodule and the module BUS, nor to components of the peripheral submodule or its PCI BUS. The interface circuit includes interface registers, a control circuit which determines which submodule is permitted to write or read data and/or address into or from a given register of the interface registers.

Abstract: A control circuit for the interface circuit of a module of a distributed process control system permits its kernel submodule and peripheral submodule to communicate through the interface circuit notwithstanding that the structure and protocol of module BUS of the kernel submodules is incompatible with the structure and protocol of the PCI BUS of the peripheral submodule. The control circuit includes a module BUS state machine (MBSM), a PCI target state machine (PTSM), an arbiter state machine (ARSM), and an address decode logic (ADL) circuit. In response to control signals from the kernel and peripheral submodules applied to the control circuit over their respective buses, and control signals produced by the MBSM, the PTSM, the ARSM, and the ADL circuit. Which one of the two submodules is granted access to the registers of the interface circuit is determined by the control circuit which also grants the peripheral submodule access through the interface circuit to the memory of the kernel submodule.