Abstract: An electronic device for testing of semiconductor components with test needles includes an electric power source, a plurality of test needles connected with the electric power source, a plurality of electric circuits, each one of the electric circuits connected upstream of one of the test needles, each one of the electric circuits including at least one circuit component which has low resistance in a range of electric currents and has high resistance above a given limit electric current, a control voltage source connected with each one of the electric circuits, and two DC/DC converter circuits connected between the control voltage source and the electric circuits.

Abstract: A method for testing semiconductor dies includes: providing a test apparatus; providing an electrically conductive carrier; providing a semiconductor substrate having a first main face, a second main face opposite to the first main face, and a plurality of semiconductor dies, the semiconductor dies including a first contact element on the first main face and a second contact element on the second main face; placing the semiconductor substrate on the carrier with the second main face facing the carrier; electrically connecting the carrier to a contact location disposed on the first main face; and testing a first semiconductor die of the plurality of semiconductor dies by electrically connecting the test apparatus with the first contact element of the first semiconductor die and the contact location.

Abstract: A probe card with a ground contact, a first contact element and a second contact element is provided. The first contact element is coupled to an interconnection node via a first interconnection line having a definite length and the second contact element is coupled to the interconnection node via a second interconnection line having the same definite length. The interconnection node is directly connected to the ground contact.

Abstract: An electronic device for testing of semiconductor components with test needles includes an electric power source, a plurality of test needles connected with the electric power source, a plurality of electric circuits, each one of the electric circuits connected upstream of one of the test needles, each one of the electric circuits including at least one circuit component which has low resistance in a range of electric currents and has high resistance above a given limit electric current, a control voltage source connected with each one of the electric circuits, and two DC/DC converter circuits connected between the control voltage source and the electric circuits.

Abstract: A method for testing semiconductor dies includes: providing a test apparatus; providing an electrically conductive carrier; providing a semiconductor substrate having a first main face, a second main face opposite to the first main face, and a plurality of semiconductor dies, the semiconductor dies including a first contact element on the first main face and a second contact element on the second main face; placing the semiconductor substrate on the carrier with the second main face facing the carrier; electrically connecting the carrier to a contact location disposed on the first main face; and testing a first semiconductor die of the plurality of semiconductor dies by electrically connecting the test apparatus with the first contact element of the first semiconductor die and the contact location.

Abstract: A method includes: providing a test apparatus; providing an electrically conductive carrier; providing a semiconductor substrate having a first main face, a second main face opposite to the first main face, and a plurality of semiconductor dies, the semiconductor dies including a first contact element on the first main face and a second contact element on the second main face; placing the semiconductor substrate on the carrier with the second main face facing the carrier; electrically connecting the carrier to a contact location disposed on the first main face; and testing a semiconductor die by electrically connecting the test apparatus with the first contact element of the semiconductor die and the contact location.

Abstract: A probe card with a ground contact, a first contact element and a second contact element is provided. The first contact element is coupled to an interconnection node via a first interconnection line having a definite length and the second contact element is coupled to the interconnection node via a second interconnection line having the same definite length. The interconnection node is directly connected to the ground contact.

Abstract: A method includes: providing a test apparatus; providing an electrically conductive carrier; providing a semiconductor substrate having a first main face, a second main face opposite to the first main face, and a plurality of semiconductor dies, the semiconductor dies including a first contact element on the first main face and a second contact element on the second main face; placing the semiconductor substrate on the carrier with the second main face facing the carrier; electrically connecting the carrier to a contact location disposed on the first main face; and testing a semiconductor die by electrically connecting the test apparatus with the first contact element of the semiconductor die and the contact location.