Abstract: Technologies for management of patient healthcare include a gateway device to read near field communication data from a near field communication device, determine a user associated with the near field communication device based on the near field communication data, receive sensor data from one or more sensors communicatively coupled to the gateway device and associated with a patient in response to a determination that the user is the patient, and store the received sensor data to a data storage of the gateway device.

Abstract: Technologies for management of patient healthcare include a gateway device to read near field communication data from a near field communication device, determine a user associated with the near field communication device based on the near field communication data, receive sensor data from one or more sensors communicatively coupled to the gateway device and associated with a patient in response to a determination that the user is the patient, and store the received sensor data to a data storage of the gateway device.

Abstract: A method and apparatus for capturing the internal state of an integrated circuit (IC) for second and higher order speedpath-induced failures. The method includes stretching one or more cycles of an internal clock signal in order to mask a first order speedpath-induced failure (SIF), wherein the internal clock signal is restored to operating at a normal speed subsequent to masking the first order SIF. The internal clock signal may be stopped at a cycle corresponding to a higher order SIF. After stopping the internal clock signal, test output data may be loaded into a scan chain. The method may also be used in conjunction with a laser or other device for other test enhancements.

Abstract: An underflow/overflow detector includes first circuitry that decodes an exponent into an exponent shift value and compares the exponent shift value with a normalize shift value to determine whether an underflow or overflow error will occur. The underflow overflow detector further includes second circuitry that compares the exponent to a maximum and minimum exponent value to determine whether an underflow or overflow error will occur.

Abstract: An apparatus for rounding an answer produced during the execution of an operation by a multiple stage execution pipeline includes first circuitry for detecting when the operation is iterative and accuracy bits associated with the answer to determine if a rounding calculation is required. When the first circuitry detects a rounding calculation is required, it sets a correction factor for the answer in accordance with a rounding mode and the detected accuracy. In a method practiced by the apparatus, the rounding an answer produced during the execution of an operation occurs through the steps of detecting, when the operation is iterative, accuracy bits associated with the answer to determine if a rounding calculation is required, and, when the rounding calculation is required, setting a correction factor for the answer in accordance with a rounding mode and the detected accuracy bits.

Abstract: A Carry-Save Adder circuit having differential signal response and output is provided. The circuit includes a pair of cross-coupled transistors powered by an upper voltage rail. The output of a first transistor of the pair of cross-coupled transistors is connected to the output of a first precharge transistor that is powered by the upper rail and controlled by a clock. The output of a second transistor of the pair of cross-coupled transistors is connected to the output of a second precharge transistor that is powered by the upper rail and controlled by the clock. A logic circuit is wired to perform a logical function, either a Sum or a Carry function, and has a plurality of inputs, an output, and a complementary output. The output of the logic circuit is connected to the output of the first transistor of the pair of cross-coupled transistors, and the complementary output is connected to the output of the second transistor of the pair of cross-coupled transistors.

Abstract: An apparatus for detecting sticky and a leading one includes first circuitry capable of detecting both sticky and a leading one. The apparatus further includes second circuitry that determines whether a sticky or a leading one detect is required. Depending upon that determination, the second circuitry controls the first circuitry to perform a sticky detection or a leading one detection. A method practiced by the apparatus includes the steps of detecting either sticky or a leading one utilizing the same circuitry, determining whether a sticky or a leading one detect is required, and controlling the circuitry in accordance with the determination of whether a sticky or a leading one detect is required.

Abstract: A multi-featured first-in-first-out (FIFO) memory device on a monolithic semiconductor integrated circuit chip. The FIFO device is bi-directional, in that the user may select the direction of data transfer through the device. The device may be configured in a transparent bypass mode of operation, wherein the FIFO memory array is bypassed, and data is transferred directed from either device input/output port to the other device input/output port. In another mode of operation allowing registered bypass operation, a byte of data may be written in an internal register from the device port being used to output data for later transfer to the device port presently being used to input data to the FIFO memory array. The FIFO device further includes a user-testable mode of operation, wherein data written into the FIFO memory array through a device input port may be read out of the same device input port.