Abstract: A secure virtual RAM securely transfers data within a device having a secure, non-volatile memory and a host. The secure virtual RAM includes a memory management component configured to direct the transfer of the data between the non-volatile memory and a processor, and an encryption/decryption component coupled to the memory management component and configured to decrypt the data provided to the processor and encrypt the data provided to the non-volatile memory. The secure virtual RAM further includes an integrity check component coupled to the encryption/decryption component and configured to monitor functional integrity, a key storage component coupled to the encryption/decryption component and configured to receive cryptographic keys and provide the cryptographic keys to the encryption/decryption component.

Abstract: A method of evaluating a cryptosystem to determine whether the cryptosystem can withstand a fault analysis attack, the method includes the steps of providing a cryptosystem having an encrypting process to encrypt a plaintext into a ciphertext, introducing a fault into the encrypting process to generate a ciphertext with faults, and comparing the ciphertext with the ciphertext with faults in an attempt to recover a key of the cryptosystem.

Abstract: A single event upset (SEU) sensitivity control system (42) dynamically hardens a digital circuit (48) to single event upsets. The sensitivity control system (42) includes an upset rate sensor (66) for detecting a quantity of particles (38) that cause single event upsets. A noise margin control circuit (70) is configured to adjust a noise margin (46) of the digital circuit (48) in response to the quantity of particles (38). Noise margin (46) is increased when a particle density (34) is high to decrease the sensitivity of the digital circuit (48) to single event upsets. Additionally, noise margin (46) is decreased when a particle density (36) is low to decrease the power consumption level of digital circuit (48).