Patents by Inventor Michael R. Kay

Michael R. Kay has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11894767
    Abstract: A power management circuit operable to reduce rush current is provided. The power management circuit is configured to provide a time-variant voltage(s) to a power amplifier(s) for amplifying a radio frequency (RF) signal(s). Notably, a variation in the time-variant voltage(s) can cause a rush current that is proportionally related to the variation of the time-variant voltage(s). To reduce the rush current, the power management circuit is configured to maintain the time-variant voltage(s) at a non-zero standby voltage level when the power amplifier(s) is inactive. When the power amplifier(s) becomes active and the time-variant voltage(s) needs to be raised or reduced from the non-zero standby voltage level, the rush current will be smaller as a result of reduced variation in the time-variant voltage(s). As such, it is possible to prolong the battery life in a device employing the power management circuit.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: February 6, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Michael R. Kay
  • Patent number: 11876488
    Abstract: The present disclosure discloses a direct current (DC)-DC boost converter, which includes a battery terminal providing a battery voltage, a charge pump coupled between the battery terminal and an interior node, and a power inductor coupled between the interior node and a power supply terminal that provides a power voltage to a radio frequency transceiver. The charge pump is configured to provide an interior voltage at the interior node based on the battery voltage. Herein, the interior voltage toggles between the battery voltage and two times the battery voltage. The charge pump includes a first switch coupled between the battery terminal and the interior node, a second switch coupled between the battery terminal and a connecting node, a third switch coupled between the connecting node and ground, and a flying capacitor coupled between the interior node and the connecting node of the second switch and the third switch.
    Type: Grant
    Filed: June 16, 2022
    Date of Patent: January 16, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Michael R. Kay, Jeffrey D. Potts, Michael J. Murphy
  • Publication number: 20230387860
    Abstract: Voltage ripple reduction in a power management circuit is disclosed. The power management circuit includes a power amplifier circuit configured to amplify a radio frequency (RF) signal based on a modulated voltage and an envelope tracking integrated circuit (ETIC) configured to provide the modulated voltage to the power amplifier circuit via a conductive path. Notably, an output impedance presenting at an input of the power amplifier circuit can interact with a modulated load current in the power amplifier circuit to create a voltage ripple in the modulated voltage to potentially cause an undesirable error in the RF signal. In this regard, a notch circuit is provided, preferably in the ETIC, to reduce the voltage ripple within a modulation bandwidth of the RF signal. As a result, it is possible to minimize the undesirable error, such as root-mean-square (RMS) error vector magnitude (EVM), within the modulation bandwidth of the RF signal.
    Type: Application
    Filed: April 5, 2023
    Publication date: November 30, 2023
    Inventors: Nadim Khlat, Michael R. Kay
  • Publication number: 20230387876
    Abstract: Equalizer circuitry includes a differential target voltage input, an equalizer output, a first operational amplifier, and a second operational amplifier. The differential target voltage input includes a target voltage input node and an inverted target voltage input node. The first operational amplifier and the second operational amplifier are coupled in series between the differential target voltage input and the equalizer output. The first operational amplifier is configured to receive a target voltage signal and provide an intermediate signal based on the target voltage input signal. The second operational amplifier is configured to receive the intermediate signal and an inverted target voltage signal and provide an output signal to the equalizer output.
    Type: Application
    Filed: May 26, 2023
    Publication date: November 30, 2023
    Inventors: Nadim Khlat, Michael R. Kay, James M. Retz
  • Publication number: 20230299730
    Abstract: An average power tracking (APT) power management circuit is provided. The APT power management circuit is configured to generate a first APT voltage(s) for a first power amplifier(s) and a second APT voltage(s) for a second power amplifier(s). The APT power management circuit further includes a pair of switcher circuits that can generate a pair of reference voltages. Depending on various operating scenarios of the APT power management circuit, it is possible to selectively output any of the reference voltages as any one or more of the first APT voltage(s) and the second APT voltage(s). As such, it is possible to flexibly configure the APT power management circuit to support the various operating scenarios based on a minimum possible number of the switcher circuits, thus helping to reduce footprint and cost of the APT power management circuit.
    Type: Application
    Filed: May 30, 2023
    Publication date: September 21, 2023
    Inventors: Nadim Khlat, Michael R. Kay
  • Patent number: 11742804
    Abstract: A switch controller for charge pump tracker circuitry is disclosed. The switch controller includes first monitoring circuitry configured to monitor a first voltage across a first flying capacitor during a first discharging phase. A second monitoring circuitry is configured to monitor a second voltage across a second flying capacitor during a second discharging phase. Further included is boost logic circuitry in communication with the first monitoring circuitry and the second monitoring circuitry, wherein the boost logic circuitry is configured in response to control a first switch network coupled to the first flying capacitor and a second switch network coupled to the second flying capacitor so that the first discharging phase and the second discharging phase alternate in an interleaved mode, and so that the first discharging phase and the second discharging phase are in phase during a parallel boost mode.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: August 29, 2023
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Michael R. Kay, Michael J. Murphy
  • Patent number: 11736076
    Abstract: An average power tracking (APT) power management circuit is provided. The APT power management circuit is configured to generate a first APT voltage(s) for a first power amplifier(s) and a second APT voltage(s) for a second power amplifier(s). The APT power management circuit further includes a pair of switcher circuits that can generate a pair of reference voltages. Depending on various operating scenarios of the APT power management circuit, it is possible to selectively output any of the reference voltages as any one or more of the first APT voltage(s) and the second APT voltage(s). As such, it is possible to flexibly configure the APT power management circuit to support the various operating scenarios based on a minimum possible number of the switcher circuits, thus helping to reduce footprint and cost of the APT power management circuit.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: August 22, 2023
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Michael R. Kay
  • Publication number: 20230238927
    Abstract: Voltage ripple reduction in a power management circuit is disclosed. The power management circuit includes a power amplifier circuit configured to amplify a radio frequency (RF) signal based on a modulated voltage and an envelope tracking integrated circuit (ETIC) configured to provide the modulated voltage to the power amplifier circuit via a conductive path. Notably, an output impedance presenting at an input of the power amplifier circuit can interact with a modulated load current in the power amplifier circuit to create a voltage ripple in the modulated voltage to potentially cause an undesirable error in the RF signal. Herein, the ETIC is configured to modify the modulated voltage based on feedback of the voltage ripple in the modulated voltage. As such, it is possible to reduce the output impedance at the input of the power amplifier circuit to thereby reduce the voltage ripple in the modulated voltage.
    Type: Application
    Filed: May 27, 2022
    Publication date: July 27, 2023
    Inventors: Michael R. Kay, Nadim Khlat
  • Patent number: 11671064
    Abstract: Equalizer circuitry includes a differential target voltage input, an equalizer output, a first operational amplifier, and a second operational amplifier. The differential target voltage input includes a target voltage input node and an inverted target voltage input node. The first operational amplifier and the second operational amplifier are coupled in series between the differential target voltage input and the equalizer output. The first operational amplifier is configured to receive a target voltage signal and provide an intermediate signal based on the target voltage input signal. The second operational amplifier is configured to receive the intermediate signal and an inverted target voltage signal and provide an output signal to the equalizer output.
    Type: Grant
    Filed: January 6, 2021
    Date of Patent: June 6, 2023
    Assignee: QORVO US, INC.
    Inventors: Nadim Khlat, Michael R. Kay, James M. Retz
  • Patent number: 11619957
    Abstract: A power management circuit operable to reduce energy loss is provided. The power management circuit is configured to provide a time-variant voltage(s) to a power amplifier(s) for amplifying an analog signal(s). To achieve best possible operating efficiency at the power amplifier(s), the time-variant voltage(s) needs to rise and fall frequently and quickly in accordance with power fluctuations of the analog signal(s). The power management circuit stores an electrical potential energy (e.g., capacitive energy) when the time-variant voltage(s) increases and discharges the electrical potential energy when the time-variant voltage(s) decreases. In embodiments disclosed herein, the power management circuit is configured to harvest a portion of the discharged electrical potential energy to thereby charge a battery. By harvesting the discharged electrical potential energy, it is possible to prolong battery life concurrent to supporting fast and frequent voltage changes.
    Type: Grant
    Filed: May 20, 2021
    Date of Patent: April 4, 2023
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Michael R. Kay
  • Patent number: 11579646
    Abstract: A power management circuit for fast average power tracking (APT) voltage switching is provided. The power management circuit includes a primary voltage circuit configured to generate an APT voltage based on an APT target voltage. However, the primary voltage circuit may be inherently slow in ramping up the APT voltage to the APT target voltage. As such, a secondary voltage circuit is provided in the power management circuit to help drive the APT voltage to a desired level by a defined temporal limit. Once the APT voltage reaches the desired level, the secondary voltage circuit will automatically shut off, while the primary voltage circuit continues operating at a selected duty cycle to maintain the APT voltage at the APT target voltage. By utilizing the secondary voltage circuit to quickly drive up the APT voltage, the power management circuit is capable of supporting dynamic power control under stringent switching delay budget.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: February 14, 2023
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Michael R. Kay
  • Patent number: 11575317
    Abstract: A switching regulator system having a switching regulator configured to generate regulated voltage pulses at a switching output in response to a setpoint of an output voltage at a setpoint input and feedback of the output voltage at a feedback input is disclosed. A power inductor is coupled between the switching output and a filtered output, and a filter capacitor is coupled between the filtered output and a fixed voltage node. A transistor having a control input is coupled between the filtered output and the fixed voltage node. A transition comparator has a first comparator input coupled to the setpoint input, a second comparator input coupled to the feedback input, and a comparator output coupled to the control input, wherein the transition comparator is configured to monitor for a setpoint voltage dropping below a feedback voltage and in response turn on the transistor to discharge the filter capacitor.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: February 7, 2023
    Assignee: Qorvo US, Inc.
    Inventors: Michael J. Murphy, Michael R. Kay
  • Patent number: 11539290
    Abstract: A power management circuit operable with low battery is provided. The power management circuit is configured to generate a time-variant average power tracking (APT) voltage based on a battery voltage supplied by a voltage source (e.g., battery). In examples disclosed herein, the power management circuit can be configured to remain operable when the battery voltage drops below a low battery threshold. Specifically, the power management circuit maintains the time-variant APT voltage at a constant level in response to the battery voltage dropping below the low battery threshold to thereby avoid drawing a rush current from the voltage source. As a result, a wireless device employing the power management circuit can remain operable with low battery to continue to support critical applications.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: December 27, 2022
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Michael R. Kay
  • Patent number: 11539289
    Abstract: A multi-level charge pump (MCP) circuit is provided. The MCP circuit includes a multi-level voltage circuit configured to receive a supply voltage and generate a low-frequency voltage. The multi-level voltage circuit includes a first switch path, a second switch path, and a third switch path each having a respective on-resistance and coupled in parallel between an input node and an output node. In a non-limiting example, the multi-level voltage circuit is configured to activate the first switch path and at least one of the second switch path and the third switch path when the multi-level voltage circuit generates the low-frequency voltage that equals the supply voltage. By activating at least two of the three switch paths to generate the low-frequency voltage, it may be possible to reduce an equivalent resistance of the multi-level voltage circuit, thus helping to improve efficiency and reduce power loss of the MCP circuit.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: December 27, 2022
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Jeffrey D. Potts, Michael R. Kay, Michael J. Murphy
  • Publication number: 20220407420
    Abstract: The present disclosure discloses a direct current (DC)-DC boost converter, which includes a battery terminal providing a battery voltage, a charge pump coupled between the battery terminal and an interior node, and a power inductor coupled between the interior node and a power supply terminal that provides a power voltage to a radio frequency transceiver. The charge pump is configured to provide an interior voltage at the interior node based on the battery voltage. Herein, the interior voltage toggles between the battery voltage and two times the battery voltage. The charge pump includes a first switch coupled between the battery terminal and the interior node, a second switch coupled between the battery terminal and a connecting node, a third switch coupled between the connecting node and ground, and a flying capacitor coupled between the interior node and the connecting node of the second switch and the third switch.
    Type: Application
    Filed: June 16, 2022
    Publication date: December 22, 2022
    Inventors: Nadim Khlat, Michael R. Kay, Jeffrey D. Potts, Michael J. Murphy
  • Publication number: 20220329217
    Abstract: A switch controller for charge pump tracker circuitry is disclosed. The switch controller includes first monitoring circuitry configured to monitor a first voltage across a first flying capacitor during a first discharging phase. A second monitoring circuitry is configured to monitor a second voltage across a second flying capacitor during a second discharging phase. Further included is boost logic circuitry in communication with the first monitoring circuitry and the second monitoring circuitry, wherein the boost logic circuitry is configured in response to control a first switch network coupled to the first flying capacitor and a second switch network coupled to the second flying capacitor so that the first discharging phase and the second discharging phase alternate in an interleaved mode, and so that the first discharging phase and the second discharging phase are in phase during a parallel boost mode.
    Type: Application
    Filed: June 29, 2022
    Publication date: October 13, 2022
    Inventors: Nadim Khlat, Michael R. Kay, Michael J. Murphy
  • Publication number: 20220224294
    Abstract: An equalizer circuit and related power management circuit are provided. The power management circuit includes a voltage amplifier circuit configured to generate an envelope tracking (ET) voltage based on a differential target voltage and provide the ET voltage to a power amplifier circuit(s) via a signal path for amplifying a radio frequency signal(s). An equalizer circuit is provided in the power management circuit to equalize the differential target voltage prior to generating the ET voltage. Specifically, the equalizer circuit is configured to provide a transfer function including a second-order complex-zero term and a real-zero term for offsetting a transfer function of an inherent trace inductance of the signal path and an inherent impedance of the voltage amplifier circuit. By employing the second-order transfer function with the real-zero term, it is possible to reduce distortion in the ET voltage, especially when the RF signal(s) is modulated in a wide modulation bandwidth.
    Type: Application
    Filed: August 26, 2021
    Publication date: July 14, 2022
    Inventors: Nadim Khlat, Michael R. Kay
  • Patent number: 11387789
    Abstract: Charge pump tracker circuitry is disclosed having a first switch network configured to couple a first flying capacitor between a voltage input terminal and a ground terminal during a first charging phase and couple the first flying capacitor between the voltage input terminal and a pump output terminal during a first discharging phase. A second switch network is configured to couple a second flying capacitor between the voltage input terminal and the ground terminal during a second charging phase and couple the second flying capacitor between the voltage input terminal and the pump output terminal during a second discharging phase. A switch controller is configured to monitor first and second voltages across the first and second flying capacitors, respectively, during the first and second discharging phases and in response to control the first and second switch networks so that the first the second discharging phases alternate in an interleaved mode.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: July 12, 2022
    Assignee: QORVO US, INC.
    Inventors: Nadim Khlat, Michael R. Kay, Michael J. Murphy
  • Publication number: 20220057820
    Abstract: A power management circuit operable to reduce energy loss is provided. The power management circuit is configured to provide a time-variant voltage(s) to a power amplifier(s) for amplifying an analog signal(s). To achieve best possible operating efficiency at the power amplifier(s), the time-variant voltage(s) needs to rise and fall frequently and quickly in accordance with power fluctuations of the analog signal(s). The power management circuit stores an electrical potential energy (e.g., capacitive energy) when the time-variant voltage(s) increases and discharges the electrical potential energy when the time-variant voltage(s) decreases. In embodiments disclosed herein, the power management circuit is configured to harvest a portion of the discharged electrical potential energy to thereby charge a battery. By harvesting the discharged electrical potential energy, it is possible to prolong battery life concurrent to supporting fast and frequent voltage changes.
    Type: Application
    Filed: May 20, 2021
    Publication date: February 24, 2022
    Inventors: Nadim Khlat, Michael R. Kay
  • Publication number: 20220037982
    Abstract: A power management circuit operable with low battery is provided. The power management circuit is configured to generate a time-variant average power tracking (APT) voltage based on a battery voltage supplied by a voltage source (e.g., battery). In examples disclosed herein, the power management circuit can be configured to remain operable when the battery voltage drops below a low battery threshold. Specifically, the power management circuit maintains the time-variant APT voltage at a constant level in response to the battery voltage dropping below the low battery threshold to thereby avoid drawing a rush current from the voltage source. As a result, a wireless device employing the power management circuit can remain operable with low battery to continue to support critical applications.
    Type: Application
    Filed: March 31, 2021
    Publication date: February 3, 2022
    Inventors: Nadim Khlat, Michael R. Kay