Patents by Inventor Michael S. Pesce

Michael S. Pesce has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit design using a frequency synthesizer that automatically ensures testability
    Patent number: 6216254
    Abstract: A system for designing integrated circuits that use frequency synthesizers to ensure testability. A testability circuit is added or connected to the frequency synthesizer that will receive allow the integrated circuit to operate in a system mode for normal function and in a test mode during testing. In the test mode, the testability circuit will inhibit the reset signal from initializing the integrated circuit until the frequency synthesizer has reached phase lock. The testability circuit may be implemented as a component in the frequency synthesizer cell in an ASIC design system such that anytime the frequency synthesizer is used, the integrated circuit is testable.
    Type: Grant
    Filed: December 16, 1998
    Date of Patent: April 10, 2001
    Assignee: LSI Logic Corporation
    Inventors: Michael S. Pesce, Kevin J. Gearhardt, Jonathan P. Kuppinger