Patents by Inventor Michael Schlansker

Michael Schlansker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10887213
    Abstract: Examples disclosed herein relate to path-synchronous performance monitoring of an interconnection network based on source code attribution. A processing node in the interconnection network has a profiler module to select a network transaction to be monitored, determine a source code attribution associated with the network transaction to be monitored, and issue a network command to execute the network transaction to be monitored. A logger module creates, in a buffer, a node temporal log associated with the network transaction and the network command. A drainer module periodically captures the node temporal log. The processing node has a network interface controller to receive the network command and mark a packet generated for the network command to be temporally tracked and attributed back to the source code attribution at each hop of the interconnection network traversed by the marked packet.
    Type: Grant
    Filed: September 15, 2017
    Date of Patent: January 5, 2021
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Milind M Chabbi, Michael Schlansker, Adarsh Yoga
  • Patent number: 10423530
    Abstract: Examples disclosed herein relate to partial cache coherence. In some examples disclosed herein, a node connected to a memory fabric may include local cache connected to a local processor and a memory coherency proxy to. The memory coherency proxy may configure a portion of a fabric memory on the memory fabric as a proxy backing memory and expose the proxy backing memory to other nodes in the memory fabric as a fictitious local memory on the node, and may implement partial coherency for memory requests directed to the fictitious local memory. The fictitious local memory may have a memory address region different from a memory address region of a native local memory on the node.
    Type: Grant
    Filed: May 8, 2017
    Date of Patent: September 24, 2019
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Jean Tourrilhes, Michael Schlansker
  • Publication number: 20190089616
    Abstract: Examples disclosed herein relate to path-synchronous performance monitoring of an interconnection network based on source code attribution. A processing node in the interconnection network has a profiler module to select a network transaction to be monitored, determine a source code attribution associated with the network transaction to be monitored, and issue a network command to execute the network transaction to be monitored. A logger module creates, in a buffer, a node temporal log associated with the network transaction and the network command. A drainer module periodically captures the node temporal log. The processing node has a network interface controller to receive the network command and mark a packet generated for the network command to be temporally tracked and attributed back to the source code attribution at each hop of the interconnection network traversed by the marked packet.
    Type: Application
    Filed: September 15, 2017
    Publication date: March 21, 2019
    Inventors: Milind M. Chabbi, Michael Schlansker, Adarsh Yoga
  • Patent number: 10146689
    Abstract: Examples disclosed herein relate to locally polling the value of a flag to determine whether a resource is free for a thread to use in a system with multiple processing nodes that are incoherent with regards to each other. A flag in a direct attached memory to one of the processing nodes is set to indicate that the resource is not free for the thread to use. A previous tail of a lock list is determined from a list master. The previous tail is located on another one of the processing nodes.
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: December 4, 2018
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Michael Schlansker, Jean Tourrilhes, Charles B. Morrey, III
  • Publication number: 20180322058
    Abstract: Examples disclosed herein relate to partial cache coherence. In some examples disclosed herein, a node connected to a memory fabric may include local cache connected to a local processor and a memory coherency proxy to. The memory coherency proxy may configure a portion of a fabric memory on the memory fabric as a proxy backing memory and expose the proxy backing memory to other nodes in the memory fabric as a fictitious local memory on the node, and may implement partial coherency for memory requests directed to the fictitious local memory. The fictitious local memory may have a memory address region different from a memory address region of a native local memory on the node.
    Type: Application
    Filed: May 8, 2017
    Publication date: November 8, 2018
    Inventors: Jean Tourrilhes, Michael Schlansker
  • Publication number: 20180210833
    Abstract: Examples disclosed herein relate to locally polling the value of a flag to determine whether a resource is free for a thread to use in a system with multiple processing nodes that are incoherent with regards to each other. A flag in a direct attached memory to one of the processing nodes is set to indicate that the resource is not free for the thread to use. A previous tail of a lock list is determined from a list master. The previous tail is located on another one of the processing nodes.
    Type: Application
    Filed: January 20, 2017
    Publication date: July 26, 2018
    Inventors: Michael Schlansker, Jean Tourrilhes, Charles B. Morrey, III
  • Patent number: 10009285
    Abstract: An example method for allocating resources in accordance with aspects of the present disclosure includes collecting proposals from a plurality of modules, the proposals assigning the resources to the plurality of modules and resulting in topology changes in a computer network environment, identifying a set of proposals in the proposals, the set of proposals complying with policies associated with the plurality of modules, instructing the plurality of modules to evaluate the set of proposals, selecting a proposal from the set of proposals, and instructing at least one module associated with the selected proposal to instantiate the selected proposal.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: June 26, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Jeffrey Clifford Mogul, Alvin Auyoung, Sujata Banerjee, Jung Gun Lee, Jean Tourrilhes, Michael Schlansker, Puneet Sharma, Lucian Popa
  • Patent number: 9871749
    Abstract: A technique includes using circuit switches to selectively couple packet switches of a switch assembly to the port connectors of the assembly.
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: January 16, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Michael Schlansker, Jean Tourrilhes, Jose Renato G. Santos, Michael Renne Ty Tan, Moray McLaren
  • Patent number: 9794171
    Abstract: Embodiments herein relate to addition or modification to a forwarding table based on an address. A first packet having a source address and a location value may be received. The source address includes a source of the first packet and the location value indicates at least part of a route along a network to the source address. The forwarding table is not modified or no new entry is added to the forwarding table, if the forwarding table does not include the source address.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: October 17, 2017
    Assignee: Hewlett Packard Enterprise Department LP
    Inventors: Jose Renato G Santos, Michael Schlansker, Jean Tourrilhes
  • Patent number: 9614777
    Abstract: One example provides a network device including a queue to receive frames from a source, a processor, and a memory communicatively coupled to the processor. The memory stores instructions causing the processor, after execution of the instructions by the processor, to determine whether a flow control threshold of the queue has been exceeded, and in response to determining that the flow control threshold of the queue has been exceeded, generate a message to be sent to the source of the frame that exceeded the flow control threshold. The message includes a pause duration for which the source is to stop transmitting frames.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: April 4, 2017
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Paul Allen Bottorff, Charles L Hudson, Michael Schlansker, Stephen G Low
  • Publication number: 20170070473
    Abstract: A method may include determining whether a host destination address of a packet received at a particular switch of a switching fabric is associated with a virtual switch address. In response to a determination that the host destination address is associated with the virtual switch address, the method may also include encapsulating the packet with the virtual switch address as a destination fabric address, where the virtual switch address is associated with a virtual switch including a first physical switch and a second physical switch. The method may further include selecting one of the first physical switch and the second physical switch as a routing path. The method may further include routing the packet to the selected physical switch based on the virtual switch address and transmitting the packet from the selected physical switch to a client switch.
    Type: Application
    Filed: March 14, 2014
    Publication date: March 9, 2017
    Inventors: Michael Schlansker, Jean Tourrilhes, Jose Renato G. Santos, Paul Allen Bottorff
  • Patent number: 9584373
    Abstract: A configurable Clos network includes leafs and spines and a switch fabric that connects the leafs and the spines. The switch fabric couples each leaf port of each leaf to at least one spine port of each spine.
    Type: Grant
    Filed: May 1, 2012
    Date of Patent: February 28, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Michael Schlansker, Jose Renato G Santos, Michael Renne Ty Tan, Guodong Zhang, Shih-Yuan Wang, Jean Tourrilhes
  • Publication number: 20160191425
    Abstract: A technique includes using circuit switches to selectively couple packet switches of a switch assembly to the port connectors of the assembly.
    Type: Application
    Filed: August 9, 2013
    Publication date: June 30, 2016
    Inventors: Michael Schlansker, Jean TOURRIHES, Jose Renato G. SANTOS, Michael Renne Ty TAN, Moray MCLAREN
  • Publication number: 20160173403
    Abstract: An example method for allocating resources in accordance with aspects of the present disclosure includes collecting proposals from a plurality of modules, the proposals assigning the resources to the plurality of modules and resulting in topology changes in a computer network environment, identifying a set of proposals in the proposals, the set of proposals complying with policies associated with the plurality of modules, instructing the plurality of modules to evaluate the set of proposals, selecting a proposal from the set of proposals, and instructing at least one module associated with the selected proposal to instantiate the selected proposal.
    Type: Application
    Filed: July 30, 2013
    Publication date: June 16, 2016
    Inventors: Jeffrey Clifford Mogul, Alvin AUYOUNG, Sujata BANERJEE, Jung Gun LEE, Jean TOURRILHES, Michael SCHLANSKER, Puneet SHARMA, Lucian POPA
  • Patent number: 9170377
    Abstract: An optical interconnect (200) includes: a reflective body (230) having a first reflective surface (235) and a second reflective surface (240) opposite the first reflective surface (235); a first optical waveguide (205) that directs a first optical signal received from a first communicating device (105) to the first reflective surface (235); a second optical waveguide (210) that directs the first optical signal from the first reflective surface (235) of the reflective body (230) to a second communicating device (110); a third optical waveguide (215) that directs a second optical signal received from the second communicating device (110) to the second reflective surface (240) of the reflective body (230); and a fourth optical waveguide (220) that directs the second optical signal from the second reflective surface (240) of the reflective body (230) to the first communicating device (105).
    Type: Grant
    Filed: July 18, 2011
    Date of Patent: October 27, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Michael Schlansker, Michael Renne Ty Tan, Shih-Yuan Wang, Wayne V. Sorin, Jose Renato G. Santos
  • Patent number: 9166817
    Abstract: A method for load balancing Ethernet traffic within a fat tree network (315, 455) includes randomly assigning incoming messages (510) into hash classes using a hash function (520); allocating the hash classes among uplinks (550); and transmitting the incoming messages on the uplinks (550) according to the hash class. A network switch (515) for load balancing communication flows in a fat tree network (315, 455) includes downlinks (545) and uplinks (550); the network switch (515) being configured to route communication flows among the downlinks (545) and uplinks (550); a hash module (520) which receives a MAC address from a message (510) and outputs a hash address; and a TCAM lookup module (535) which allocates the hash address into a hash class and allocates the hash class to one of the uplinks (550).
    Type: Grant
    Filed: January 19, 2009
    Date of Patent: October 20, 2015
    Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Michael Schlansker, Jean Tourrilhes
  • Publication number: 20150229575
    Abstract: One example provides a network device including a queue to receive frames from a source, a processor, and a memory communicatively coupled to the processor. The memory stores instructions causing the processor, after execution of the instructions by the processor, to determine whether a flow control threshold of the queue has been exceeded, and in response to determining that the flow control threshold of the queue has been exceeded, generate a message to be sent to the source of the frame that exceeded the flow control threshold. The message includes a pause duration for which the source is to stop transmitting frames.
    Type: Application
    Filed: August 21, 2012
    Publication date: August 13, 2015
    Inventors: Paul Allen Bottorff, Charles L Hudson, Michael Schlansker, Stephen G Low
  • Publication number: 20150124612
    Abstract: Multi-tenant network provisioning is disclosed. An example method of multi-tenant network provisioning includes setting at least one rate limiter on output ports of a node in the network on a tenant-by-tenant basis. The method also includes enforcing communication rates over shared edge links based on the rate limiter.
    Type: Application
    Filed: June 7, 2012
    Publication date: May 7, 2015
    Inventors: Michael Schlansker, Jean Tourrihes, Jose Renato G. Santos
  • Publication number: 20150110488
    Abstract: A configurable Clos network includes leafs and spines and a switch fabric that connects the leafs and the spines. The switch fabric couples each leaf port of each leaf to at least one spine port of each spine.
    Type: Application
    Filed: May 1, 2012
    Publication date: April 23, 2015
    Inventors: Michael Schlansker, Jose Renato G. Santos, Michael Renne Ty Tan, Guodong Zhang, Shih-Yuan Wang, Jean Tourrilhes
  • Patent number: 9007895
    Abstract: In a method (400) for routing packets between a plurality of top switches (110a-110n) and a plurality of leaf switches (120a-120n) using a balancing table (204, 208, 210) in a fat tree network (100), a failed link between at least one top switch (110n) and at least one leaf switch (120n) is detected (402). In addition, the balancing table (204, 208, 210) is modified (406) based on the detected failed link, and the packets are routed (408) between the plurality of top switches (110a-110n) and the plurality of leaf switches (120a-120n) in the fat tree network (100) based on the modified balancing table (204, 208, 210).
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: April 14, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Michael Schlansker, Jean Tourrilhes, Yoshio Turner