Abstract: Instruments and methods are disclosed for left atrial appendage (LAA) closure. An exemplary occluder comprises a lattice framework and an anchor. An exemplary delivery tool provides a catheter-based means of delivery of the occluder to the left atrium and LAA of a heart, such as a human heart, and deployment of the occluder by minimally invasive surgery.

Abstract: Disclosed are devices and methods for providing simple, fast, effective, and repeatable anastomotic graft connections, which can reduce (or eliminate) risks associated with graft anastomoses, thus improving patient outcomes. An example embodiment is an anastomotic graft connection device that includes a connector and a cuff. The connector includes a first flared end and a second flared end. The first flared end is configured to be inserted into a vessel (e.g., blood vessel). At least the second flared end is configured to be attached to a graft. The cuff includes an inner ring and an outer ring. The inner ring is configured to secure the graft to at least the second flared end of the connector, and the outer ring is configured to exert force on the vessel to seal the first flared end of the connector against an inner wall of the vessel.

Abstract: A system and method for cooling an open air vehicle is provided. The system comprises a housing mounted on the vehicle configured to hold a water tank and a water filter. The system further comprises a water pump and one or more air blowers coupled to the water pump. The system further comprises a battery configured to supply power to the water pump and the one or more air blowers. The method comprises storing water in a water tank the water tank positioned within a housing on the vehicle. The method further comprises powering a water pump, via a battery, and pumping water from the water pump out of one or misting tips. The method further comprises providing one or more air blowers that distributes cold air and water coming out the misting tips.

Abstract: Pusher assemblies for use in microelectronic device testing systems and methods for using such pusher assemblies are disclosed herein. One particular embodiment of such a pusher assembly comprises a plate having a first side and a second side opposite the first side. An engagement assembly is removably coupled to the second side of the plate and positioned to contact a microfeature device being tested. The pusher assembly can include an urging member proximate the first side of the plate and configured to move the engagement assembly toward the device being tested. The pusher assembly can also include a heat transfer unit carried by the first side of the plate. In several embodiments, the pusher assembly can further include a plurality of pins carried by the engagement assembly such that the pins extend through the plate and engage the urging member to restrict axial movement of the urging member toward the device being tested.

Abstract: Pusher assemblies for use in microelectronic device testing systems and methods for using such pusher assemblies are disclosed herein. One particular embodiment of such a pusher assembly comprises a plate having a first side and a second side opposite the first side. An engagement assembly is removably coupled to the second side of the plate and positioned to contact a microfeature device being tested. The pusher assembly can include an urging member proximate the first side of the plate and configured to move the engagement assembly toward the device being tested. The pusher assembly can also include a heat transfer unit carried by the first side of the plate. In several embodiments, the pusher assembly can further include a plurality of pins carried by the engagement assembly such that the pins extend through the plate and engage the urging member to restrict axial movement of the urging member toward the device being tested.

Abstract: Pusher assemblies for use in microelectronic device testing systems and methods for using such pusher assemblies are disclosed herein. One particular embodiment of such a pusher assembly comprises a plate having a first side and a second side opposite the first side. An engagement assembly is removably coupled to the second side of the plate and positioned to contact a microfeature device being tested. The pusher assembly can include an urging member proximate the first side of the plate and configured to move the engagement assembly toward the device being tested. The pusher assembly can also include a heat transfer unit carried by the first side of the plate. In several embodiments, the pusher assembly can further include a plurality of pins carried by the engagement assembly such that the pins extend through the plate and engage the urging member to restrict axial movement of the urging member toward the device being tested.

Abstract: Pusher assemblies for use in microelectronic device testing systems and methods for using such pusher assemblies are disclosed herein. One particular embodiment of such a pusher assembly comprises a plate having a first side and a second side opposite the first side. An engagement assembly is removably coupled to the second side of the plate and positioned to contact a microfeature device being tested. The pusher assembly can include an urging member proximate the first side of the plate and configured to move the engagement assembly toward the device being tested. The pusher assembly can also include a heat transfer unit carried by the first side of the plate. In several embodiments, the pusher assembly can further include a plurality of pins carried by the engagement assembly such that the pins extend through the plate and engage the urging member to restrict axial movement of the urging member toward the device being tested.

Abstract: Stress and force management techniques for a semiconductor die to help compensate for stress within the semiconductor die and to help compensate for forces applied to the semiconductor die to minimize damage thereto.

Abstract: Test sockets, test systems, and methods for testing microfeature devices with a substrate and a plurality of conductive interconnect elements projecting from the substrate. In one embodiment, a test socket includes a support surface and a plurality of apertures in the support surface corresponding to at least some of the interconnect elements of the microfeature device. The individual apertures extend through the test socket and are sized to receive a portion of one of the interconnect elements so that the substrate is spaced apart from the support surface when the microfeature device is received in the test socket. In one aspect of this embodiment, the individual apertures have a cross-sectional dimension less than a cross-sectional dimension of the interconnect elements so that the apertures receive only a portion of the corresponding interconnect element.

Abstract: Test sockets, test systems, and methods for testing microfeature devices with a substrate and a plurality of conductive interconnect elements projecting from the substrate. In one embodiment, a test socket includes a support surface and a plurality of apertures in the support surface corresponding to at least some of the interconnect elements of the microfeature device. The individual apertures extend through the test socket and are sized to receive a portion of one of the interconnect elements so that the substrate is spaced apart from the support surface when the microfeature device is received in the test socket. In one aspect of this embodiment, the individual apertures have a cross-sectional dimension less than a cross-sectional dimension of the interconnect elements so that the apertures receive only a portion of the corresponding interconnect element.

Abstract: Stress and force management techniques for a semiconductor die to help compensate for stress within the semiconductor die and to help compensate for forces applied to the semiconductor die to minimize damage thereto.

Abstract: Test sockets, test systems, and methods for testing microfeature devices with a substrate and a plurality of conductive interconnect elements projecting from the substrate. In one embodiment, a test socket includes a support surface and a plurality of apertures in the support surface corresponding to at least some of the interconnect elements of the microfeature device. The individual apertures extend through the test socket and are sized to receive a portion of one of the interconnect elements so that the substrate is spaced apart from the support surface when the microfeature device is received in the test socket. In one aspect of this embodiment, the individual apertures have a cross-sectional dimension less than a cross-sectional dimension of the interconnect elements so that the apertures receive only a portion of the corresponding interconnect element.

Abstract: An integrated circuit is provided having an alignment feature integral with the lead frame. The integrated circuit includes a lead frame coupled with a semiconductor die, and is partially encapsulated in insulating material. The lead frame has the alignment feature therein. The alignment feature includes a cut out on the lead frame taking the form of a semicircle, protuberance, apertures, or slots. Alternatively, the alignment feature includes a removably coupled tab. After testing of the integrated circuit has been completed, the alignment tab is removed from the integrated circuit. The alignment feature can also be provided on a heat spreader which is attached to a side of or within the lead frame package.

Abstract: An integrated circuit is provided having an alignment feature integral with the lead frame. The integrated circuit includes a lead frame coupled with a semiconductor die, and is partially encapsulated in insulating material. The lead frame has the alignment feature therein. The alignment feature includes a cut out on the lead frame taking the form of a semicircle, protuberance, apertures, or slots. Alternatively, the alignment feature includes a removably coupled tab. After testing of the integrated circuit has been completed, the alignment tab is removed from the integrated circuit. The alignment feature can also be provided on a heat spreader which is attached to a side of or within the lead frame package.

Abstract: An improved and novel fabrication method for a magnetic element, and more particularly a magnetic element (10) including a first electrode (14) , a second electrode (18) and a spacer layer (16). The first electrode (14) includes a fixed ferromagnetic layer (26) having a thickness t1. A second electrode (18) is included and comprises a free ferromagnetic layer (28) having a thickness t2. A spacer layer (16) is located between the fixed ferromagnetic layer (26) and the free ferromagnetic (28) layer, the spacer layer (16) having a thickness t3, where 0.25t3<t1<2t3, thereby producing near zero magnetic field at the free ferromagnetic layer (28).

Abstract: An improved and novel fabrication method for a magnetic element, and more particularly a magnetic element (10) including a first electrode (14), a second electrode (18) and a spacer layer (16). The first electrode (14) includes a fixed ferromagnetic layer (26) having a thickness t1. A second electrode (18) is included and comprises a free ferromagnetic layer (28) having a thickness t2. A spacer layer (16) is located between the fixed ferromagnetic layer (26) and the free ferromagnetic (28) layer, the spacer layer (16) having a thickness t3, where 0.25t3<t1<2t3, thereby producing near zero magnetic field at the free ferromagnetic layer (28).

Abstract: An integrated circuit is provided having an alignment feature integral with the lead frame. The integrated circuit includes a lead frame coupled with a semiconductor die, and is partially encapsulated in insulating material. The lead frame has the alignment feature therein. The alignment feature includes a cut out on the lead frame taking the form of a semi-circle, protuberance, apertures, or slots. Alternatively, the alignment feature includes a removably coupled tab. After testing of the integrated circuit has been completed, the alignment tab is removed from the integrated circuit. The alignment feature can also be provided on a heat spreader which is attached to a side of or within the lead frame package.

Abstract: An integrated circuit is provided having an alignment feature integral with the lead frame. The integrated circuit includes a lead frame coupled with a semiconductor die, and is partially encapsulated in insulating material. The lead frame has the alignment feature therein. The alignment feature includes a cut out on the lead frame taking the form of a semi-circle, protuberance, apertures, or slots. Alternatively, the alignment feature includes a removably coupled tab. After testing of the integrated circuit has been completed, the alignment tab is removed from the integrated circuit. The alignment feature can also be provided on a heat spreader which is attached to a side of or within the lead frame package.

Abstract: An improved and novel magnetic element (10; 10′; 50; 50′; 80) including a plurality of thin film layers wherein the bit end magneto-static demagnetizing fields cancel the total positive coupling of the structure to obtain dual magnetic states in a zero external field. Additionally disclosed is a method of fabricating a magnetic element (10) by providing a plurality of thin film layers wherein the bit end magneto-static demagnetizing fields of the thin film layers cancel the total positive coupling of the structure to obtain dual magnetic states in a zero external field.

Abstract: A method of fabricating a flux concentrator for use in magnetic memory devices including the steps of providing at least one magnetic memory bit (10) and forming proximate thereto a material stack defining a copper (Cu) damascene bit line (56) including a flux concentrating layer (52). The method includes the steps of depositing a bottom dielectric layer (32), an optional etch stop (34) layer, and a top dielectric layer (36) proximate the magnetic memory bit (10). A trench (38) is etched in the top dielectric layer (36) and the bottom dielectric layer (32). A first barrier layer (42) is deposited in the trench (38). Next, a metal system (29) is deposited on a surface of the first barrier layer (42). The metal system (29) includes a copper (Cu) seed material (44), and a plated copper (Cu) material (46), a first outside barrier layer (50), a flux concentrating layer (52), and a second outside barrier layer (54). The metal system (29) is patterned and etched to define a copper (Cu) damascene bit line (56).