Patents by Inventor Michael Steven Siegel

Michael Steven Siegel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7120630
    Abstract: Novel data structures, methods and apparatus for finding a full match between a search pattern and a pattern stored in a leaf of the search tree. A key is input, a hash function is performed on the key, a direct table (DT) is accessed, and a tree is walked through pattern search control blocks (PSCBs) until reaching a leaf. The search mechanism uses a set of data structures that can be located in a few registers and regular memory, and then used to build a Patricia tree structure that can be manipulated by a relatively simple hardware macro. Both keys and corresponding information needed for retrieval are stored in the Patricia tree structure. The hash function provides an n->n mapping of the bits of the key to the bits of the hash key.
    Type: Grant
    Filed: August 28, 2003
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Brian Mitchell Bass, Jean Louis Calvignac, Marco C. Heddes, Antonios Maragkos, Piyush Chunilal Patel, Michael Steven Siegel, Fabrice Jean Verplanken
  • Patent number: 7106730
    Abstract: A network device including an ingress processor and egress processor which receives frames of data over the network on an input port, and transfers it to an appropriate output port. The received frame is processed by an ingress processor which prepares an intra-switch frame for delivery to an egress processor serving a relevant output port of the switch. The intra-switch frame includes a frame header having parameters which have been determined by the ingress processor, as well as data indicating an address for the egress processor for beginning processing of the frame. By identifying to the egress processor processing which has already taken place, the egress processor is relieved of any redundant processing of the frame. The egress processor provides a hardware frame classifier which decodes the information contained in the intra-frame header to derive parameters which have been previously computed as well as a starting address for the egress processor.
    Type: Grant
    Filed: April 11, 2000
    Date of Patent: September 12, 2006
    Assignee: International Business Machines Corporation
    Inventors: Brian Mitchell Bass, Jean Louis Calvignac, Anthony Matteo Gallo, Marco C. Heddes, Michael Steven Siegel, Fabrice Jean Verplanken
  • Patent number: 7072299
    Abstract: A receiver may be adapted to prevent overflow or underflow of its data storage by generating a transmit rate value as a feedback to the sender. Speed adjustments are performed periodically with a fixed time period denoted by Dt. Transmission rates are explicitly 0, Max/2, and Max. The receiver queue is itself drained at a rate R that at any time satisfies 0<=R<=Max. The level of occupancy of the receiver storage queue is denoted by Q. The maximum capacity of the receiving queue is designated Qmax, so at any time, 0<=Q<=Qmax. Two thresholds T1 and T2 (with 0<T1<T2<Qmax) of levels of the receiver queue value Q are determined. A transmit rate is then determined by the level of the receiver queue Q compared to the thresholds. The transmit rate feedback value achieves the desired goal of avoiding overflow and, once the value of Q has been positive at least once, avoiding underflow.
    Type: Grant
    Filed: August 20, 2001
    Date of Patent: July 4, 2006
    Assignee: International Business Machines Corporation
    Inventors: Brian Mitchell Bass, Clark Debs Jeffries, Michael Steven Siegel
  • Patent number: 6985431
    Abstract: A network switch apparatus, components for such an apparatus, and methods of operating such an apparatus in which data flow handling and flexibility is enhanced by the cooperation of a control point and a plurality of interface processors formed on a semiconductor substrate. The control point and interface processors together form a network processor capable of cooperating with other elements including an optional switching fabric device in executing instructions directing the flow of data in a network.
    Type: Grant
    Filed: August 27, 1999
    Date of Patent: January 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Brian Mitchell Bass, Jean Louis Calvignac, Anthony Matteo Gallo, Marco C. Heddes, Sridhar Rao, Michael Steven Siegel, Fabrice Jean Verplanken, Brian Alan Youngman
  • Patent number: 6977928
    Abstract: A system and method of transmitting multiple output messages from a single input message system where the system is keeping the messages in order by correlating the output messages with the input messages. For each output message, an indicator is associated with the output message indicating whether this output message is the last message being generated for the given input message. This allows multicasting to occur in a system where the output is matched to the input by allowing multiple output messages to be associated with a single input message.
    Type: Grant
    Filed: April 13, 2000
    Date of Patent: December 20, 2005
    Assignee: International Business Machines Corporation
    Inventors: Brian Mitchell Bass, Jean Louis Calvignac, Marco C. Heddes, Steven Kenneth Jenkins, Michael Steven Siegel, Fabrice Jean Verplanken
  • Patent number: 6952424
    Abstract: A system and method of moving information units from a network processor toward a data transmission network in a prioritized sequence which accommodates several different levels of service. The present invention includes a method and system for scheduling the egress of processed information units (or frames) from a network processing unit according to stored priorities associated with the various sources of the information units. The priorities in the preferred embodiment include a low latency service, a minimum bandwidth, a weighted fair queueing and a system for preventing a user from continuing to exceed his service levels over an extended period. The present invention includes a weighted fair queueing system where the position of the next service in a best efforts system for using bandwidth which is not used by committed bandwidth is determined based on the length of the frame and the weight of the particular flow.
    Type: Grant
    Filed: April 13, 2000
    Date of Patent: October 4, 2005
    Assignee: International Business Machines Corporation
    Inventors: Brian Mitchell Bass, Jean Louis Calvignac, Marco C. Heddes, Michael Steven Siegel, Fabrice Jean Verplanken
  • Patent number: 6947931
    Abstract: Novel data structures, methods and apparatus for finding the longest prefix match search when searching tables with variable length patterns or prefixes. To find the exact match or the best matching prefix, patterns have to be compared a bit at a time until the exact or first match is found. This requires ā€œnā€ number of comparisons or memory accesses to identify the closest matching pattern. The trees are built in such a way that the matching result is guaranteed to be a best match, whether it is an exact match or a longest prefix match. Using the trail of all the birds and associated prefix lengths enables determination of the correct prefix result from the trail. By construction, the search tree provides the best matching prefix at or after the first compare during walking of the trail or tree.
    Type: Grant
    Filed: April 6, 2000
    Date of Patent: September 20, 2005
    Assignee: International Business Machines Corporation
    Inventors: Brian Mitchell Bass, Jean Louis Calvignac, Marco C. Heddes, Antonios Maragkos, Piyush Chunilal Patel, Michael Steven Siegel, Fabrice Jean Verplanken
  • Patent number: 6898179
    Abstract: The transport protocol for communicating between general purpose processors acting as contact points and network processors in a packet processing environment such as Ethernet is provided. In such an environment, there is at least one single control point processor (CP) and a plurality of network processors (NP), sometimes referred to as blades. A typical system could contain two to sixteen network processors, and each network processor connects to a plurality of devices which communicate with each other over a network transport, such as Ethernet. The CP typically controls the functionality and the functioning of the network processors to function in a way that connects one end user with another, whether or not the end user is on the same network processor or a different network processor.
    Type: Grant
    Filed: April 7, 2000
    Date of Patent: May 24, 2005
    Assignee: International Business Machines Corporation
    Inventors: Brian Mitchell Bass, Jean Louis Calvignac, Anthony Matteo Gallo, Marco C. Heddes, Mark Anthony Rinaldi, Michael Steven Siegel, Colin Beaton Verrilli, Fabrice Jean Verplanken
  • Patent number: 6868082
    Abstract: A network apparatus comprising storage units storing configuration information about the network apparatus, an input network interface to at least one network physical line, at least one processor receiving network data from said network interface, processing said data, storing information about said network data in said storage units, storing said data as formatted data units in said storage units, a first bus interface to two bus connections, a first hardware component reading said configuration information and said information about data stored in said storing units and steering said formatted data units stored in said storage units to at least one of the two bus connections of said first bus interface, a second bus interface to two bus connections, an output network interface to at least one network physical line, a second hardware component reading formatted data units arriving on at least one of the two bus connections of said second bus interface and storing said formatted data units in said storage un
    Type: Grant
    Filed: August 30, 1999
    Date of Patent: March 15, 2005
    Assignee: International Business Machines Corporation
    Inventors: James Johnson Allen, Jr., Brian Mitchell Bass, Jean Louis Calvignac, Santosh Prasad Gaur, Marco C. Heddes, Michael Steven Siegel, Fabrice Jean Verplanken
  • Patent number: 6862292
    Abstract: A system and method of moving information units from a network processor toward a data transmission network in a prioritized sequence which accommodates several different levels of service. The present invention includes a method and system for scheduling the egress of processed information units (or frames) from a network processing unit according to stored priorities associated with the various sources of the information units. The priorities in the preferred embodiment include a low latency service, a minimum bandwidth, a weighted fair queueing and a system for preventing a user from continuing to exceed his service levels over an extended period. The present invention includes a plurality of calendars with different service rates to allow a user to select the service rate which he desires. If a customer has chosen a high bandwidth for service, the customer will be included in a calendar which is serviced more often than if the customer has chosen a lower bandwidth.
    Type: Grant
    Filed: April 13, 2000
    Date of Patent: March 1, 2005
    Assignee: International Business Machines Corporation
    Inventors: Brian Mitchell Bass, Jean Louis Calvignac, Marco C. Heddes, Michael Steven Siegel, Fabrice Jean Verplanken
  • Patent number: 6842443
    Abstract: A network switch apparatus, components for such an apparatus, and methods of operating such an apparatus in which data flow handling and flexibility is enhanced by the cooperation among a plurality of interface processors and a suite of peripheral elements formed on a semiconductor substrate. The interface processors and peripherals together form a network processor capable of cooperating with other elements including an optional switching fabric device in executing instructions directing the flow of data in a network.
    Type: Grant
    Filed: October 23, 2001
    Date of Patent: January 11, 2005
    Assignee: International Business Machines Corporation
    Inventors: James Johnson Allen, Jr., Brian Mitchell Bass, Jean Louis Calvignac, Santosh Prasad Gaur, Marco C. Heddes, Michael Steven Siegel, Fabrice Jean Verplanken
  • Patent number: 6829651
    Abstract: Method and apparatus for receiving a data frame on a received port of a network switch. The data frame includes a source media access control (MAC) address for the first device, and a destination MAC address for a second device connected to another port of the network. The data frame is forwarded to a target port which is connected to the second device. The MAC address is learned locally at the target port which facilities communications for frames which later enter the target port and contain addresses previously learned from a received frame.
    Type: Grant
    Filed: April 11, 2000
    Date of Patent: December 7, 2004
    Assignee: International Business Machines Corporation
    Inventors: Brian Mitchell Bass, Teresa Lynn Davis, Anthony Matteo Gallo, Michael Steven Siegel, Fabrice Jean Verplanken, Gail Irene Woodland
  • Publication number: 20040228339
    Abstract: A system and method of protocol and frame classification in a system for data processing (e.g., switching or routing data packets or frames). The present invention includes analyzing a portion of the packet or frame according to predetermined tests, then storing key characteristics of the packet for use in subsequent processing of the frame. The key characteristics for the frame (or input information unit, such as the type of layer 3 protocol used in the frame, the layer 2 encapsulation technique, the starting instruction address and flags indicating whether the frame uses a virtual local area network, preferably using hardware to quickly and in a uniform time period. The stored key characteristics of the packet are then used by the network processing complexes in its further processing of the frame. The processor is preconditioned with a starting instruction address and the location of the beginning of the layer 3 header as well as flags for the type of frame.
    Type: Application
    Filed: June 17, 2004
    Publication date: November 18, 2004
    Inventors: Anthony Matteo Gallo, Marco C. Heddes, Ross Boyd Leavens, Michael Steven Siegel, Jean Louis Calvignac, Gordon Taylor Davis
  • Patent number: 6804249
    Abstract: A system and method of moving information units from a network processor toward a data transmission network in a prioritized sequence which accommodates several different levels of service. The present invention includes a method and system for scheduling the egress of processed information units (or frames) from a network processing unit according to service based on minimum bandwidth specifications where position in the queue is adjusted after each service based on minimum bandwidth specificaiton and the length of frame, a process which is subject to rounding errors. To avoid the accumulation of rounding errors inequitably influencing the position of some in the queue, a system to adjust for the rounding errors adds an increased measure of fairness to the system.
    Type: Grant
    Filed: April 13, 2000
    Date of Patent: October 12, 2004
    Assignee: International Business Machines Corporation
    Inventors: Brian Mitchell Bass, Jean Louis Calvignac, Marco C. Heddes, Michael Steven Siegel, Fabrice Jean Verplanken
  • Patent number: 6795870
    Abstract: A system and method uses grouped calendars, flow queues, pointers and stored rules to process information packets so that different flow control characteristics associated with the information units are maintained.
    Type: Grant
    Filed: April 13, 2000
    Date of Patent: September 21, 2004
    Assignee: International Business Machines Corporation
    Inventors: Brian Mitchell Bass, Jean Louis Calvignac, Marco C. Heddes, Michael Steven Siegel, Fabrice Jean Verplanken
  • Patent number: 6775284
    Abstract: A system and method of protocol and frame classification in a system for data processing (e.g., switching or routing data packets or frames). The present invention includes analyzing a portion of the packet or frame according to predetermined tests, then storing key characteristics of the packet for use in subsequent processing of the frame. The key characteristics for the frame (or input information unit, such as the type of layer 3 protocol used in the frame, the layer 2 encapsulation technique, the starting instruction address and flags indicating whether the frame uses a virtual local area network, preferably using hardware to quickly and in a uniform time period. The stored key characteristics of the packet are then used by the network processing complexes in its further processing of the frame. The processor is preconditioned with a starting instruction address and the location of the beginning of the layer 3 header as well as flags for the type of frame.
    Type: Grant
    Filed: January 7, 2000
    Date of Patent: August 10, 2004
    Assignee: International Business Machines Corporation
    Inventors: Jean Louis Calvignac, Gordon Taylor Davis, Anthony Matteo Gallo, Marco C. Heddes, Ross Boyd Leavens, Michael Steven Siegel
  • Patent number: 6771652
    Abstract: A method and system for controlling a flow of a plurality of packets in a computer network is disclosed. The computer network includes a queue. The method and system include determining a queue level for the queue and determining an offered rate of the plurality of packets to the queue. The method and system also include controlling a transmission fraction of the plurality of packets to the queue, based on the queue level, the offered rate and a previous value of the transmission fraction so that the transmission fraction and the queue level are critically damped if the queue level is between at least a first queue level and a second queue level.
    Type: Grant
    Filed: November 23, 1999
    Date of Patent: August 3, 2004
    Assignee: International Business Machines Corporation
    Inventors: Metin Aydemir, Brian Mitchell Bass, Clark Debs Jeffries, Sonia Kiang Rovner, Michael Steven Siegel, Anthony Matteo Gallo
  • Patent number: 6769033
    Abstract: A network processor useful in network switch apparatus and methods of operating such a processor in which data flow handling and flexibility is enhanced by the cooperation of an embedded processor complex with a suite of peripherals, all formed on a common semiconductor substrate. The interface processors provide data paths for inbound and outbound data flow and operate under the control of instructions stored in an instruction store formed on the semiconductor substrate, while storage of transiting data flow portions is provided by memory peripherals and interfaces to external memory elements.
    Type: Grant
    Filed: August 27, 1999
    Date of Patent: July 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Brian Mitchell Bass, Jean Louis Calvignac, Anthony Matteo Gallo, Marco C. Heddes, Ross Boyd Leavens, Piyush Chunilal Patel, Mark Anthony Rinaldi, Michael Steven Siegel, Fabrice Jean Verplanken
  • Patent number: 6766381
    Abstract: A network processor useful in network switch apparatus and methods of operating such a processor in which data flow handling and flexibility is enhanced by the cooperation of a plurality of interface processors formed on a semiconductor substrate. The interface processors provide data paths for inbound and outbound data flow and operate under the control of instructions stored in an instruction store formed on the semiconductor substrate.
    Type: Grant
    Filed: August 27, 1999
    Date of Patent: July 20, 2004
    Assignee: International Business Machines Corporation
    Inventors: Kenneth James Barker, Brian Mitchell Bass, Jean Louis Calvignac, Marco C. Heddes, Michael Steven Siegel, Michael Raymond Trombley, Fabrice Jean Verplanken
  • Patent number: 6728253
    Abstract: A method and system are disclosed for allocating data input bandwidth from a source link to a plurality of N data queues each having a variable occupancy value, Qi(t), and a constant decrement rate, Di, where i designated the ith queue among the N queues. First, a threshold occupancy value, T, is designated for the N queues. During each time step of a repeating time interval, &Dgr;t, the occupancy value, Qi, is compared with T. In response to each and every of said N data queues having occupancy values exceeding T, pausing data transmission from the source link to the N data queues, such that overflow within the data queues is minimized. In response to at least one of the N data queues having an occupancy value less than or equal to T, selecting one among the N data queues to be incremented, and incrementing the selected data queue, such that underflow of the selected queue is minimized. In the context of scheduling one cell per time step, the value of T is one.
    Type: Grant
    Filed: September 24, 1999
    Date of Patent: April 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Clark Debs Jeffries, Marco C. Heddes, Mark Anthony Rinaldi, Michael Steven Siegel