Abstract: Thrombectomy catheter and pump assemblies for controlling a flow of effluent from a thrombectomy catheter. An illustrative assembly may a thrombectomy catheter, a pump, a connection manifold assembly positioned between the thrombectomy catheter and the pump, an effluent return tube fluidly coupled to the thrombectomy catheter and the connection manifold assembly, an effluent collection bag, an effluent waste tube fluidly coupled to the connection manifold assembly and the effluent waste bag, and a spool valve positioned in line with the effluent waste tube.

Abstract: Embodiments are directed to sharing namespaces across file system clusters. A file in a spoke file system may be determined based on a command provided to the spoke file system such that the file may be associated with an inode mask. Data blocks associated with the file may be determined based on the command and the inode mask such that the data blocks may be absent from the spoke file system. Requests for leases may be generated based on the absent data blocks such that each lease request corresponds to a portion of the absent data blocks Employing the leases provided by a hub file system to: copy the absent data blocks from the hub file system where each portion of absent data blocks may be associated with a lease; updating the inode mask to include the leases and each copied portion of absent blocks.

Abstract: A streaming media service can permit artists or other users to create and upload “posts” to the service. Posts can include text, references to content items in the catalog of the streaming media service, and/or non-catalog media content items that are created by the artist and uploaded as part of the post. Posts can be presented to users as they browse the catalog of the streaming media service and/or in a dedicated feed. The rendering of a post on a user device can include graphical user interface controls that allow the user to access content items referenced by or included in the post.

Abstract: A streaming media service can permit artists or other users to create and upload “posts” to the service. Posts can include text, references to content items in the catalog of the streaming media service, and/or non-catalog media content items that are created by the artist and uploaded as part of the post. Posts can be presented to users as they browse the catalog of the streaming media service and/or in a dedicated feed. The rendering of a post on a user device can include graphical user interface controls that allow the user to access content items referenced by or included in the post.

Abstract: A streaming media service can permit artists or other users to create and upload “posts” to the service. Posts can include text, references to content items in the catalog of the streaming media service, and/or non-catalog media content items that are created by the artist and uploaded as part of the post. Posts can be presented to users as they browse the catalog of the streaming media service and/or in a dedicated feed. The rendering of a post on a user device can include graphical user interface controls that allow the user to access content items referenced by or included in the post.

Abstract: A stiffener apparatus for reducing warpage of an integrated circuit package during heating and cooling are provided. The stiffener apparatus includes an IC substrate configured to receive an IC die on a top side of the IC substrate. The stiffener apparatus includes a primary stiffener ring adhered to the top side of the IC substrate and defining an opening in a region of the IC die such that the primary stiffener ring surrounds the region of the IC die. The primary stiffener ring defines a plurality of grooves. The stiffener apparatus includes a secondary stiffener ring having a plurality of catches configured to engage with the plurality of grooves to removably attach the secondary stiffener ring to the primary stiffener ring on a side of the primary stiffener ring opposite the IC substrate. A method of using a stiffener apparatus during a manufacturing operation is also provided.

Abstract: Systems and methods are provided for distributing a playlist of a user. The systems and methods receive an indication from the user of a song to add to the playlist and adds the song to the playlist. In aspects, the systems and methods analyze the playlist to determine whether an attribute of the playlist meets a specified parameter. In some cases, the specified parameter can be met if a musical attribute of the song is similar to a music profile of one of the users, or if an amount of songs on the playlist meets or exceeds a specified threshold. The systems and methods can enable the user to distribute the playlist either publicly or to a specified set of users if the specified parameter of the playlist is met.

Abstract: Techniques of determining user preferences are described. One embodiment can include a user's electronic device receiving, from a server, icons assigned to a category. The icons may be presented on a display associated with the electronic device. Next, the device may receive inputs via a user interface associated with the device. Each of the inputs may correspond to a selected one of the icons and includes at least one of a plurality of input types. In response to each input, a display status of a selected icon may be adjusted on the display based on the corresponding input type. The display status of each icon indicates a user preference level for the category assigned to the icon. The device can send the user preference levels for the plurality of categories to the server. Other embodiments are also described.

Abstract: In a memory system, variable resistance circuits, such as transistor circuits, in the word line and bit line decoders are set during bias line set times and/or prior to turn-on times of read operations to increased resistance levels. The variable resistance circuits are kept at the increased resistance levels during an initial turn-on time period during which a selected memory cell may conducts a current spike. The increased resistance levels of the variable resistance circuit may operate to reduce or limit the width of the current spike. In response to the initial turn-on time period ending, the variable resistance circuits are set back to low resistance levels to facilitate subsequent sense results detection events and program operations.

Abstract: In a memory system, variable resistance circuits, such as transistor circuits, in the word line and bit line decoders are set during bias line set times and/or prior to turn-on times of read operations to increased resistance levels. The variable resistance circuits are kept at the increased resistance levels during an initial turn-on time period during which a selected memory cell may conducts a current spike. The increased resistance levels of the variable resistance circuit may operate to reduce or limit the width of the current spike. In response to the initial turn-on time period ending, the variable resistance circuits are set back to low resistance levels to facilitate subsequent sense results detection events and program operations.

Abstract: A stiffener apparatus for reducing warpage of an integrated circuit package during heating and cooling are provided. The stiffener apparatus includes an IC substrate configured to receive an IC die on a top side of the IC substrate. The stiffener apparatus includes a primary stiffener ring adhered to the top side of the IC substrate and defining an opening in a region of the IC die such that the primary stiffener ring surrounds the region of the IC die. The primary stiffener ring defines a plurality of grooves. The stiffener apparatus includes a secondary stiffener ring having a plurality of catches configured to engage with the plurality of grooves to removably attach the secondary stiffener ring to the primary stiffener ring on a side of the primary stiffener ring opposite the IC substrate. A method of using a stiffener apparatus during a manufacturing operation is also provided.

Abstract: A bit line read voltage generator may operate in a high drive strength or current mode to drive a selected bit line voltage to a read selected bit line voltage at a high level, and then may switch to operating in a low drive strength or current mode. Doing so may control, such as by limiting, the amount of cell current if the selected memory cell turns on, reducing the likelihood of false writes. Also, a word line read voltage generator may operate in a high drive strength or current mode to ramp up a selected word line voltage level, and then may switch to operating in a low drive strength or current mode to shorten the time for a global selected word line voltage to decrease to below a trip level and/or to control an amount of the cell current when the selected memory cell turns on.

Abstract: The present disclosure generally relates to the fabrication of and methods for creating a reversible tri-state memory device which provides both forward and reverse write and read drive to a bi-directional RRAM cell, thus allowing writing in the forward and reverse directions. The memory device, however, utilizes a single transistor “on pitch” which fits between two metal lines traversing the array tile.

Abstract: The present disclosure generally relates to non-volatile memory arrays and memory devices in which a leakage current through an OTS is utilized to pre-charge a circuit of a memory chip. By running an additional wire on each side of a tile which is orthogonal to, above, or below the X and Y select wires, a high value resistance material, such as an OTS, may be deposited at the intersection. The OTS allows the word line or bit line to be selected without pulling excessive leakage to the select wire from the bias voltage, such as V/2. A thickness of the OTS is adjusted such that the Vt of the OTS is greater than V/2, with margin, and the OTS does not turn on when the OTS is selected. A resistance is created between the V/2 wire and the word line select wire or the bit line select wire.

Abstract: The present disclosure generally relates to the fabrication of and methods for creating a reversible tri-state memory device which provides both forward and reverse write and read drive to a bi-directional RRAM cell, thus allowing writing in the forward and reverse directions. The memory device, however, utilizes a single transistor “on pitch” which fits between two metal lines traversing the array tile.

Abstract: The present disclosure generally relates to the fabrication of and methods for creating a reversible tri-state memory device which provides both forward and reverse write and read drive to a bi-directional RRAM cell, thus allowing writing in the forward and reverse directions. The memory device, however, utilizes a single transistor “on pitch” which fits between two metal lines traversing the array tile.

Abstract: The present disclosure generally relates to non-volatile memory arrays and memory devices in which a leakage current through an OTS is utilized to pre-charge a circuit of a memory chip. By running an additional wire on each side of a tile which is orthogonal to, above, or below the X and Y select wires, a high value resistance material, such as an OTS, may be deposited at the intersection. The OTS allows the word line or bit line to be selected without pulling excessive leakage to the select wire from the bias voltage, such as V/2. A thickness of the OTS is adjusted such that the Vt of the OTS is greater than V/2, with margin, and the OTS does not turn on when the OTS is selected. A resistance is created between the V/2 wire and the word line select wire or the bit line select wire.

Abstract: The present disclosure generally relates to the fabrication of and methods for creating a reversible tri-state memory device which provides both forward and reverse write and read drive to a bi-directional RRAM cell, thus allowing writing in the forward and reverse directions. The memory device, however, utilizes a single transistor “on pitch” which fits between two metal lines traversing the array tile.