Patents by Inventor Michael W. Bartels

Michael W. Bartels has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • High integrity recovery from multi-bit data failures
    Patent number: 6948091
    Abstract: Methods and system for facilitating a computing platform to recover quickly from transient multi-bit data failures within a run-time data memory array in a manner that is transparent to software applications executing on the computing platform. A fault-tolerant digital computing system is provided for that utilizes parallel processing lanes in a lockstep architecture. Each processing lane includes error detectors that are configured to detect multi-bit data errors in each processing lane's memory arrays. Upon detection of a multi-bit data failure, an interrupt is generated wherein control logic software responds to the interrupt and corrects the data errors in the memory array of each processing lane.
    Type: Grant
    Filed: May 2, 2002
    Date of Patent: September 20, 2005
    Assignee: Honeywell International Inc.
    Inventors: Michael W. Bartels, Nicholas J. Wilt, Scott L. Gray
  • High integrity recovery from multi-bit data failures
    Publication number: 20030208704
    Abstract: Methods and system for facilitating a computing platform to recover quickly from transient multi-bit data failures within a run-time data memory array in a manner that is transparent to software applications executing on the computing platform. A fault-tolerant digital computing system is provided for that utilizes parallel processing lanes in a lockstep architecture. Each processing lane includes error detectors that are configured to detect multi-bit data errors in each processing lane's memory arrays. Upon detection of a multi-bit data failure, an interrupt is generated wherein control logic software responds to the interrupt and corrects the data errors in the memory array of each processing lane.
    Type: Application
    Filed: May 2, 2002
    Publication date: November 6, 2003
    Inventors: Michael W. Bartels, Nicholas J. Wilt, Scott L. Gray