Abstract: A method of enhancing the gray scale resolution of a PWM system. The method includes defining an N-bit PWM sequence with a length of 2N?1 units. The N-bit PWM sequence includes a least significant bit (LSB) segment characterized by a temporal length of one unit. In some embodiments, the temporal length of one unit is referred to as a time t0. The method also includes defining a fractional PWM sequence. The fractional PWM sequence includes the N-bit PWM sequence and a fractional bit segment of temporal length F. The temporal length of the fractional PWM sequence is 2N?1+F units. In a particular embodiment, F=1 and the temporal length of the fractional PWM sequence is 2N.

Abstract: A memory control apparatus for block-matching motion estimation and an associated search pattern for processing video sequence in real-time are described in this disclosure. The motion estimation subsystem utilizes a set of memory banks to store a section of the reference picture used for computing the differences between an underlying block and a spatially shifted reference block. The memory control apparatus derives the memory addresses for storing the reference picture region in the memory banks in such a way that a row or a column of data from the reference block can be accessed in parallel without wait. The row- or column-data are then made available to the parallel computation unit for computing the block difference in a single processing cycle. An associated spiral search pattern that covers the whole search region is also described that minimizes the required data access and consequently saves power consumption.

Abstract: A memory control apparatus for block-matching motion estimation and an associated search pattern for processing video sequence in real-time are described in this disclosure. The motion estimation subsystem utilizes a set of memory banks to store a section of the reference picture used for computing the differences between an underlying block and a spatially shifted reference block. The memory control apparatus derives the memory addresses for storing the reference picture region in the memory banks in such a way that a row or a column of data from the reference block can be accessed in parallel without wait. The row- or column-data are then made available to the parallel computation unit for computing the block difference in a single processing cycle. An associated spiral search pattern that covers the whole search region is also described that minimizes the required data access and consequently saves power consumption.