Abstract: A flash memory management method, wherein: the data to be stored are organized in logic blocks; the memory is divided into pages; and each page is divided into frames, each frame being capable of containing at least one data block and at least one first frame metadata block containing all or part of the index values of the data block in an index tree, an index value corresponding to the address of a frame.

Abstract: A counter is stored in a page of a flash memory having a plurality of pages. Header information is written to the page. The header information includes a first word containing a number of the page, a second word containing a first value of the counter, and a third word containing an initial error control code, which takes into account the first value of the counter. Counter information is written into frames of the selected page. The frames have a same number of words. Writing counter information into a frame includes writing a counter identifier that identifies the counter and a value independent from the counter identifier into the frame. A current value of the counter is determined based on the first value of the counter in the header data and frames of the selected page into which the counter information is written.

Abstract: A flash memory is divided into pages defining an erase granularity of the flash memory. A count value is written into page metadata. Each page is divided into frames. Each frame contains at least one data block and at least two frame metadata words including a first frame metadata word to store a block identifier. A current page is opened by incrementing the count value and writing the incremented count value into the at least one first page metadata word. The current page has its at least one first page metadata word containing a highest count value of the counter of the number of written pages. A logic data block is written into a selected frame and a block identifier of the logic data block is written into the first frame metadata word of the selected frame.

Abstract: A flash memory management method, wherein: the data to be stored are organized in logic blocks; the memory is divided into pages; and each page is divided into frames, each frame being capable of containing at least one data block and at least one first frame metadata block containing all or part of the index values of the data block in an index tree, an index value corresponding to the address of a frame.

Abstract: A flash memory management method, including: the data to be stored are organized in logic blocks; the memory is divided into pages; each page is divided into frames, each frame being capable of containing at least one data block and at least two frame metadata words; each page comprises at least one page metadata word which contains, when a page is written, a value of a counter of the number of written pages; a writing of a logic block into the memory goes along with a programming of a first frame metadata word with an identifier of this logic block; and the page into which the writing is to be performed is selected as being that having its first metadata word containing the maximum value of the counter of written pages from among all pages.

Abstract: A method of storing at least one counter into a flash memory, wherein each page of the memory assigned to the storage of the counter(s) includes: header data including a first word intended to contain a number of the page, one word per counter to store a first value thereof, and a second word intended to contain an error control code calculated by taking into account the first values; frames all having a same number of words, each frame being intended to contain a value independent from the frame data, and at least one occurrence of an identifier of a counter, each written frame representing an increment or decrement of the value of the concerned counter with respect to its first value.

Abstract: A counter in a non-volatile memory including at least two sub-counters, each counting with a different modulo, an increment of the counter being transferred on a single one of the sub-counters and the sub-counters being incremented sequentially.

Abstract: A method of derivation, by an electronic circuit, of a first key from a second key, wherein: at least one third key is derived from the second key and is used to derive the first key; and a value of a counter, representative of the number of first keys, conditions the derivation of a new value of the third key.

Abstract: A counter in a non-volatile memory including at least two sub-counters, each counting with a different modulo, an increment of the counter being transferred on a single one of the sub-counters and the sub-counters being incremented sequentially.

Abstract: A counter in a non-volatile memory including at least two sub-counters, each counting with a different modulo, an increment of the counter being transferred on a single one of the sub-counters and the sub-counters being incremented sequentially.

Abstract: A method of derivation, by an electronic circuit, of a first key from a second key, wherein: at least one third key is derived from the second key and is used to derive the first key; and a value of a counter, representative of the number of first keys, conditions the derivation of a new value of the third key.

Abstract: A counter in a non-volatile memory including at least two sub-counters, each counting with a different modulo, an increment of the counter being transferred on a single one of the sub-counters and the sub-counters being incremented sequentially.

Abstract: An offline payment method includes communicating a commitment value calculated by an electronic check medium to a terminal configured to receive a payment from the electronic check medium. The commitment value is calculated based on a first authentication code and secret key, wherein the first authentication code is calculated based on a payment amount and secret verification key. The terminal determines and communicates a random/pseudo-random guesstimation to the electronic check medium in response to receiving the verification code, the random/pseudo-random guesstimation being configured to verify that the electronic check medium is authentic. The electronic check medium determines and communicates a second authentication code to the terminal, the second authentication based upon the random/pseudo-random guesstimation.

Abstract: An offline payment method includes communicating a commitment value calculated by an electronic check medium to a terminal configured to receive a payment from the electronic check medium. The commitment value is calculated based on a first authentication code and a secret key, wherein the first authentication code is calculated based on a payment amount and a secret verification key. The terminal determines and communicates a random/pseudo-random guesstimation to the electronic check medium in response to receiving the verification code, the random/pseudo-random guesstimation being configured to verify that the electronic check medium is authentic. The electronic check medium determines and communicates a second authentication code to the terminal, the second authentication based upon the random/pseudo-random guesstimation.

Abstract: A process and arrangement that gives selective access to a security system, particularly in a payment system using debit cards, credit cards, or withdrawal of funds contained in a so-called smart card, and in particular on a chip card. The system comprises at least one first device and at least one second device that must be used in a correct configuration with one another in order to gain access. Access is gained by verifying that a certain coded key K2, held in the second device, is recognized as being valid by the first device, after comparing it with a renewing key K1 and previous versions of the code key K1 contained in the first device.

Abstract: The invention relates to a method and an apparatus for producing a key that is common to two devices that belong to different sets and are intended to implement a common cryptographic procedure. Each device is assigned a mother key (KC, KP) and a daughter key (KP.sub.ck, KC.sub.pi). The daughter key is developed on the basis of the mother key of the other device and of an identification datum specific to the device. When the procedure is performed, the two devices exchange their identification datum (ck, pi), which when processed with the aid of the mother key held by the device will yield the daughter key (KC.sub.pi, KP.sub.ck) of the other device. The pair of keys formed by the daughter key already held and by the daughter key that is calculated constitutes the common key.