Patents by Inventor Michele Petracca

Michele Petracca has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11868241
    Abstract: A method for optimizing a verification regression includes obtaining data, by a processor, of previously executed runs of at least one verification regression session; extracting from the data, by the processor, values of one or a plurality of control knobs and values of one or a plurality verification metrics that were recorded during the execution for each of the previously executed runs of said at least one verification regression; finding, by the processor, correlation between said one or a plurality of the control knobs and each said one or a plurality of verification metrics, and generating a set of one or a plurality of control conditions based on the found correlation; and applying, by the processor, the generated set of one or a plurality of control conditions on the verification environment or on the DUT, or on both, to obtain a new verification regression session.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: January 9, 2024
    Assignee: Cadence Design Systems, Inc.
    Inventors: Yael Kinderman, Yosinori Watanabe, Michele Petracca, Ido Avraham
  • Patent number: 10607039
    Abstract: A method including receiving a first configuration of a device validated against a design constraint, is provided. A configuration includes stimuli controls and stimuli parameters used as inputs in a device model. The method includes determining a quality of the first configuration based on an estimation of an output parameter including a desired behavior of the device, simulating the device in the first configuration when the first configuration quality overcomes a threshold, and requesting a second configuration of the device when the quality of the first configuration is below the selected threshold. The method also includes obtaining a regression based on multiple, high quality configurations to determine, for the device, a distribution of output parameter values and comparing the distribution of output parameter values with a baseline of a random regression to adjust the machine learning engine according to a target range of output parameter values.
    Type: Grant
    Filed: November 27, 2017
    Date of Patent: March 31, 2020
    Assignee: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Yael Kinderman, Shlomi Uziel, Ido Avraham, Michele Petracca, Yosinori Watanabe
  • Patent number: 10423741
    Abstract: A method including selecting multiple input parameters of a device configuration environment to perform multiple simulations on an electronic device defined by the device configuration environment is provided. The method with multiple values for the multiple input parameters and a value of an output parameter resulting from the multiple simulations, and extracting a distribution of output parameter values and a distribution of input parameter values from a database. The method also includes finding a correlation involving the multiple input parameters and the output parameter based on a target range of the output parameter, and identifying an expected value of the output parameter using a range of values of the multiple input parameters in the correlation involving the multiple input parameters and the output parameter. A system and a nontransitory, computer-readable medium including instructions to perform the above method are also provided.
    Type: Grant
    Filed: November 15, 2017
    Date of Patent: September 24, 2019
    Assignee: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Michele Petracca, Yosinori Watanabe, Yael Kinderman, Shlomi Uziel, Ido Avraham
  • Patent number: 10409939
    Abstract: A method including evaluating a configuration of a device for a selected device parameter and determining a value of the selected device parameter in a first optimal configuration that improves a performance of the device is provided. The method includes determining a sensitivity of the performance of the device relative to the value of the selected device parameter and determining a performance metric that differentiates the first optimal configuration with a second optimal configuration based on the sensitivity of the performance of the device. The method includes ranking the first optimal configuration and the second optimal configuration based on the performance metric and simulating the performance of the device with a second device parameter in one of the first optimal configuration or the second optimal configuration, based on the ranking. A system and a computer readable medium to perform the above method are also provided.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: September 10, 2019
    Assignee: Cadence Design Systems, Inc.
    Inventors: Michele Petracca, Yosinori Watanabe
  • Patent number: 10140202
    Abstract: A method including receiving source code for controlling a system on a chip and correlating a datum and an instruction in the source code with a first node is provided. The method includes associating the first node with a resource used by the datum and the instruction, based on a model for the system on a chip, illustrating a link between the first node and a second node, indicative of a data dependency in the source code between the first node and the second node, and evaluating a performance of the system on a chip controlled by the source code. Also including forming an annotated source code based on the performance of the system on a chip. A system and a non-transitory, computer-readable medium including instructions to perform the method are also provided.
    Type: Grant
    Filed: September 21, 2017
    Date of Patent: November 27, 2018
    Assignee: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Michele Petracca, Yosinori Watanabe