Patents by Inventor Michelle D. Griglione

Michelle D. Griglione has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8227319
    Abstract: A method for forming a germanium-enriched region in a heterojunction bipolar transistor and a heterojunction bipolar transistor comprising a germanium-enriched region. A base having a silicon-germanium portion is formed over a collector. Thermal oxidation of the base causes a germanium-enriched region to form on a surface of the silicon-germanium portion subjected to the thermal oxidation. An emitter is formed overlying the germanium-enriched portion region. The germanium-enriched region imparts advantageous operating properties to the heterojunction bipolar transistor, including improved high-frequency/high-speed operation.
    Type: Grant
    Filed: March 22, 2010
    Date of Patent: July 24, 2012
    Assignee: Agere Systems Inc.
    Inventor: Michelle D. Griglione
  • Publication number: 20120115299
    Abstract: A method for forming a germanium-enriched region in a heterojunction bipolar transistor and a heterojunction bipolar transistor comprising a germanium-enriched region. A base having a silicon-germanium portion is formed over a collector. Thermal oxidation of the base causes a germanium-enriched region to form on a surface of the silicon-germanium portion subjected to the thermal oxidation. An emitter is formed overlying the germanium-enriched portion region. The germanium-enriched region imparts advantageous operating properties to the heterojunction bipolar transistor, including improved high-frequency/high-speed operation.
    Type: Application
    Filed: January 11, 2012
    Publication date: May 10, 2012
    Inventor: Michelle D. Griglione
  • Publication number: 20110230031
    Abstract: A method for forming a germanium-enriched region in a heterojunction bipolar transistor and a heterojunction bipolar transistor comprising a germanium-enriched region. A base having a silicon-germanium portion is formed over a collector. Thermal oxidation of the base causes a germanium-enriched region to form on a surface of the silicon-germanium portion subjected to the thermal oxidation. An emitter is formed overlying the germanium-enriched portion region. The germanium-enriched region imparts advantageous operating properties to the heterojunction bipolar transistor, including improved high-frequency/high-speed operation.
    Type: Application
    Filed: March 22, 2010
    Publication date: September 22, 2011
    Inventor: Michelle D. Griglione
  • Patent number: 7714361
    Abstract: A method for forming a germanium-enriched region in a heterojunction bipolar transistor and a heterojunction bipolar transistor comprising a germanium-enriched region. A base having a silicon-germanium portion is formed over a collector. Thermal oxidation of the base causes a germanium-enriched region to form on a surface of the silicon-germanium portion subjected to the thermal oxidation. An emitter is formed overlying the germanium-enriched portion region. The germanium-enriched region imparts advantageous operating properties to the heterojunction bipolar transistor, including improved high-frequency/high-speed operation.
    Type: Grant
    Filed: March 10, 2005
    Date of Patent: May 11, 2010
    Assignee: Agere Systems Inc.
    Inventor: Michelle D. Griglione
  • Publication number: 20080191245
    Abstract: A method for forming a germanium-enriched region in a heterojunction bipolar transistor and a heterojunction bipolar transistor comprising a germanium-enriched region. A base having a silicon-germanium portion is formed over a collector. Thermal oxidation of the base causes a germanium-enriched region to form on a surface of the silicon-germanium portion subjected to the thermal oxidation. An emitter is formed overlying the germanium-enriched portion region. The germanium-enriched region imparts advantageous operating properties to the heterojunction bipolar transistor, including improved high-frequency/high-speed operation.
    Type: Application
    Filed: March 10, 2005
    Publication date: August 14, 2008
    Inventor: Michelle D. Griglione
  • Patent number: 7132297
    Abstract: A thin-film multilayer high-Q inductor having a ferromagnetic core and spanning at least three metal layers is formed by forming a plurality of parallel first metal runners on the semiconductor substrate. A plurality of first and second vertical conductive vias are formed in electrical connection with each end of the plurality of metal runners. A plurality of third and fourth conductive vias are formed over the plurality of first and second conductive vias and a plurality of second metal runners are formed interconnecting the plurality of third and fourth conductive vias. The first metal runners and second metal runners are oriented such that one end of a first metal runner is connected to an overlying end of a second metal runner by way of the first and third vertical conductive vias. The other end of the second metal runner is connected to the next metal one runner by way of the second and fourth vertical conductive vias., forming a continuously conductive structure having a generally helical shape.
    Type: Grant
    Filed: May 7, 2003
    Date of Patent: November 7, 2006
    Assignee: Agere Systems Inc.
    Inventors: Michelle D. Griglione, Paul Arthur Layman, Mohamed Laradji, J. Ross Thomson, Samir Chaudhry
  • Patent number: 6667536
    Abstract: A thin-film multi-layer high Q transformer. To form an outer transformer winding a plurality of parallel first level metal runners are formed in a first insulating layer overlying the semiconductor substrate. A plurality of vertical conductive vias are formed in third and fourth insulating layers and in electrical communication with each end of the first level metal runners. A fourth insulating layer is disposed over the third insulating layer and additional vertical conductive vias and a fourth level metal runner are formed therein. Thus, the fourth level metal runners and the intervening vertical conductive vias connect each of the first level metal runners to form a continuously conductive structure having a generally helical shape. The inner winding of the transformer is similarly formed.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: December 23, 2003
    Assignee: Agere Systems Inc.
    Inventors: Samir Chaudhry, Paul Arthur Layman, J. Ross Thomson, Mohamed Laradji, Michelle D. Griglione
  • Patent number: 6639298
    Abstract: A thin-film multi-layer high Q inductor spanning at least three metal layers is formed by forming a plurality of parallel first metal runners on the semiconductor substrate. A plurality of first and second vertical conductive vias are formed in electrical communications with each end of the plurality of metal runners. A plurality of third and fourth conductive vias are formed over the plurality of first and second conductive vias and a plurality of second metal runners are formed interconnecting the plurality of third and fourth conductive vias. The plurality of first metal runners are in a different vertical than the plurality of second metal runners such that the planes intersect. Thus one end of a first metal runner is connected to an overlying end of a second metal runner by way of the first and third vertical conductive vias. The other end of the second metal runner is connected to the next metal one runner by way of the second and fourth vertical conductive vias.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: October 28, 2003
    Assignee: Agere Systems Inc.
    Inventors: Samir Chaudhry, Paul Arthur Layman, J. Ross Thomson, Mohamed Laradji, Michelle D. Griglione
  • Publication number: 20030003603
    Abstract: A thin-film multi-layer high Q transformer. To form an outer transformer winding a plurality of parallel first level metal runners are formed in a first insulating layer overlying the semiconductor substrate. A plurality of vertical conductive vias are formed in third and fourth insulating layers and in electrical communication with each end of the first level metal runners. A fourth insulating layer is disposed over the third insulating layer and additional vertical conductive vias and a fourth level metal runner are formed therein. Thus, the fourth level metal runners and the intervening vertical conductive vias connect each of the first level metal runners to form a continuously conductive structure having a generally helical shape. The inner winding of the transformer is similarly formed.
    Type: Application
    Filed: October 5, 2001
    Publication date: January 2, 2003
    Inventors: Samir Chaudhry, Paul Arthur Layman, J. Ross Thomson, Mohamed Laradji, Michelle D. Griglione
  • Publication number: 20030001231
    Abstract: A thin-film multi-layer high Q inductor spanning at least three metal layers is formed by forming a plurality of parallel first metal runners on the semiconductor substrate. A plurality of first and second vertical conductive vias are formed in electrical communications with each end of the plurality of metal runners. A plurality of third and fourth conductive vias are formed over the plurality of first and second conductive vias and a plurality of second metal runners are formed interconnecting the plurality of third and fourth conductive vias. The plurality of first metal runners are in a different vertical than the plurality of second metal runners such that the planes intersect. Thus one end of a first metal runner is connected to an overlying end of a second metal runner by way of the first and third vertical conductive vias. The other end of the second metal runner is connected to the next metal one runner by way of the second and fourth vertical conductive vias.
    Type: Application
    Filed: October 5, 2001
    Publication date: January 2, 2003
    Inventors: Samir Chaudhry, Paul Arthur Layman, J. Ross Thomson, Mohamed Laradji, Michelle D. Griglione