Patents by Inventor Michiel Antonius Petrus Pertijs

Michiel Antonius Petrus Pertijs has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130127552
    Abstract: Disclosed an electronic device comprising an ovenized system containing a micro-electromechanical (MEM) resonator and a method for controlling such an MEM resonator. In one embodiment, the MEM resonator comprises a resonator body suspended above a substrate by means of at least a first and a second mechanical support forming a first and a second heating resistance, respectively, configured to heat the resonator body through Joules heating, biasing means configured to apply a bias voltage to the resonator body to enable vibration at a predetermined operating frequency, a temperature control system configured to control the temperature of the micro-electromechanical resonator, and an internal voltage monitoring system configured to monitor a voltage level of the resonator body.
    Type: Application
    Filed: November 21, 2011
    Publication date: May 23, 2013
    Applicant: IMEC
    Inventors: Jonathan Borremans, Michiel Antonius Petrus Pertijs
  • Patent number: 7986164
    Abstract: An apparatus includes a digital interface circuit configured to provide a digital interface. The digital interface is configurable based on a mode of operation of the digital interface circuit. The apparatus also includes input and output level-shift circuits. The input level-shift circuit is configured to shift a voltage level of an input signal for the digital interface circuit. The output level-shift circuit is configured to shift a voltage level of an output signal from the digital interface circuit. The input level-shifting and the output level-shifting are based on first and second level-shift input voltages. The apparatus further includes a mode detector configured to identify at least two modes of operation for the digital interface circuit based on the first and second level-shift input voltages. For example, the digital interface circuit could be configured to function as a serial or parallel interface depending on which level-shift input voltage is greater.
    Type: Grant
    Filed: May 10, 2010
    Date of Patent: July 26, 2011
    Assignee: National Semiconductor Corporation
    Inventor: Michiel Antonius Petrus Pertijs
  • Patent number: 7834685
    Abstract: An apparatus includes a plurality of amplifier stages configured to receive an input voltage and generate an amplified output current. Each amplifier stage includes a transconductance stage configured to receive the input voltage and generate a first intermediate output current. Each amplifier stage also includes an auto-zeroing loop configured to generate a second intermediate output current that at least partially corrects for an offset of the transconductance stage, where the auto-zeroing loop operates at a first frequency. Each amplifier stage further includes chopping circuitry configured to reverse a polarity of the input voltage and a polarity of the amplified output current at a second frequency, where the second frequency is less than the first frequency. Each amplifier stage is configured to operate in auto-zeroing and amplification phases. At least one amplifier stage operates in the auto-zeroing phase when at least one other amplifier stage operates in the amplification phase.
    Type: Grant
    Filed: October 15, 2008
    Date of Patent: November 16, 2010
    Assignee: National Semiconductor Corporation
    Inventor: Michiel Antonius Petrus Pertijs
  • Publication number: 20100225352
    Abstract: An apparatus includes a digital interface circuit configured to provide a digital interface. The digital interface is configurable based on a mode of operation of the digital interface circuit. The apparatus also includes input and output level-shift circuits. The input level-shift circuit is configured to shift a voltage level of an input signal for the digital interface circuit. The output level-shift circuit is configured to shift a voltage level of an output signal from the digital interface circuit. The input level-shifting and the output level-shifting are based on first and second level-shift input voltages. The apparatus further includes a mode detector configured to identify at least two modes of operation for the digital interface circuit based on the first and second level-shift input voltages. For example, the digital interface circuit could be configured to function as a serial or parallel interface depending on which level-shift input voltage is greater.
    Type: Application
    Filed: May 10, 2010
    Publication date: September 9, 2010
    Applicant: NATIONAL SEMICONDUCTOR CORPORATION
    Inventor: Michiel Antonius Petrus Pertijs
  • Patent number: 7714612
    Abstract: An apparatus includes a digital interface circuit configured to provide a digital interface. The digital interface is configurable based on a mode of operation of the digital interface circuit. The apparatus also includes input and output level-shift circuits. The input level-shift circuit is configured to shift a voltage level of an input signal for the digital interface circuit. The output level-shift circuit is configured to shift a voltage level of an output signal from the digital interface circuit. The input level-shifting and the output level-shifting are based on first and second level-shift input voltages. The apparatus further includes a mode detector configured to identify at least two modes of operation for the digital interface circuit based on the first and second level-shift input voltages. For example, the digital interface circuit could be configured to function as a serial or parallel interface depending on which level-shift input voltage is greater.
    Type: Grant
    Filed: October 15, 2008
    Date of Patent: May 11, 2010
    Assignee: National Semiconductor Corporation
    Inventor: Michiel Antonius Petrus Pertijs
  • Patent number: 7671677
    Abstract: A circuit includes an input stage configured to receive and amplify an input signal to produce an amplified signal, where the input signal is referenced to a higher voltage and is associated with a common mode voltage. The circuit also includes level shifter resistors configured to level shift the amplified signal to produce a shifted signal. The level shifter resistors are configured to provide a voltage drop so that the shifted signal is referenced to a lower voltage. The input stage may include multiple transistors floating in one or more isolated portions of a substrate, where the transistors perform amplification in the input stage. The circuit may also include circuitry configured to control current through the level shifter resistors so that the voltage drop depends on the common mode voltage of the input signal. In addition, the lower voltage may be between supply rails of the circuit.
    Type: Grant
    Filed: February 13, 2008
    Date of Patent: March 2, 2010
    Assignee: National Semiconductor Corporation
    Inventors: Willem Johannes Kindt, Michiel Antonius Petrus Pertijs
  • Publication number: 20090201086
    Abstract: A circuit includes an input stage configured to receive and amplify an input signal to produce an amplified signal, where the input signal is referenced to a higher voltage and is associated with a common mode voltage. The circuit also includes level shifter resistors configured to level shift the amplified signal to produce a shifted signal. The level shifter resistors are configured to provide a voltage drop so that the shifted signal is referenced to a lower voltage. The input stage may include multiple transistors floating in one or more isolated portions of a substrate, where the transistors perform amplification in the input stage. The circuit may also include circuitry configured to control current through the level shifter resistors so that the voltage drop depends on the common mode voltage of the input signal. In addition, the lower voltage may be between supply rails of the circuit.
    Type: Application
    Filed: February 13, 2008
    Publication date: August 13, 2009
    Applicant: National Semiconductor Corporation
    Inventors: Willem Johannes Kindt, Michiel Antonius Petrus Pertijs