Patents by Inventor Michihiro Furuta

Michihiro Furuta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5498994
    Abstract: An active filter device simple in construction and low in price in which higher harmonic components can be stably suppressed without requiring a passive filter even when a load to be compensated includes a capacitative load.
    Type: Grant
    Filed: August 24, 1994
    Date of Patent: March 12, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Michihiro Furuta
  • Patent number: 5438253
    Abstract: A static var generator using self-commutated inverter being able to resume its operation securely and smoothly immediately after a system grounding accident disappears and whose system can be stabilized securely after the accident is provided. The static var generator using self-commutated inverter of the present invention is provided with an accident-detecting circuit 21 comprising band pass filters 22a and 22b extracting the second harmonic components contained in active voltage feedback signals Vp- and reactive voltage feedback signals V.sub.Q -, comparators 23a and 23b comparing these output signals and a prescribed set value and judging of the occurrence of an accident, and an OR circuit 24 operating logical sums of these both output signals. Further, the static type power generator of the present invention comprises a reactive current reference zero controlling circuit 20 controlling a reactive current reference signal I.sub.
    Type: Grant
    Filed: December 6, 1993
    Date of Patent: August 1, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tomohiko Aritsuka, Michihiro Furuta
  • Patent number: 4639917
    Abstract: A fault-determining apparatus includes parity error checking for data transferred from a main storage and an input/output unit to a CPU which has an interrupt procedure called by the detection of a parity error for recording a parity error signal in a trace recording memory along with a fault-detection signal and data transferred to a data bus from predetermined addresses of interest in the main storage and the input/output unit.
    Type: Grant
    Filed: June 22, 1984
    Date of Patent: January 27, 1987
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Michihiro Furuta