Abstract: A semiconductor package includes a metal board, a first frame, and a second frame. The metal board has an upper surface with a mount area on which a semiconductor device is mountable. The first frame is located on the upper surface of the metal board to surround the mount area. The second frame is located on a bottom surface of the metal board to overlap the first frame. The metal board includes a protrusion protruding from its bottom surface. The protrusion has side surfaces in contact with inner walls of the second frame. The protrusion has a bottom surface located below the second frame.

Abstract: A semiconductor package includes a metal board, a first frame, and a second frame. The metal board has an upper surface with a mount area on which a semiconductor device is mountable. The first frame is located on the upper surface of the metal board to surround the mount area. The second frame is located on a bottom surface of the metal board to overlap the first frame. The metal board includes a protrusion protruding from its bottom surface. The protrusion has side surfaces in contact with inner walls of the second frame. The protrusion has a bottom surface located below the second frame.

Abstract: A device for insulating an electrically conducting plane having a first electric potential relatively to a second electric potential is provided. The device comprises an insulating substrate including two parallel planar surfaces, a first conducting outer layer and an electrostatic field reducer. The electrostatic field reducer reduces the value of the electrostatic field in a point of the peripheral edge, the reducer includes at least one conducting area distinct from the first outer layer, positioned on the first surface of the insulating substrate and/or in the insulating substrate. The reducer reduces the value of the electrostatic field in this point relative to the value of the electrostatic field in this point in the absence of the conducting area. The conducting area has a potential with a value strictly comprised between the values of the first and second potentials.

Abstract: An optical semiconductor apparatus includes a lid body bonded to an upper surface of a frame body, the lid body having an opening at a position vertically overlapping with an optical semiconductor device. The lid body has a first portion which is positioned to surround the opening and has an upper surface to which a light-transmissive member is bonded, a second portion which is positioned to surround the first portion, and a third portion which is positioned to surround the second portion and has a lower surface to which the frame body is bonded. The upper surface of the first portion is positioned lower than an upper surface of the third portion. The second portion has a thin-walled portion positioned to surround the first portion, the thin-walled portion having a thickness thinner than that of the first portion as well as thinner than that of the third portion.

Abstract: An optical semiconductor apparatus includes a lid body bonded to an upper surface of a frame body, the lid body having an opening at a position vertically overlapping with an optical semiconductor device. The lid body has a first portion which is positioned to surround the opening and has an upper surface to which a light-transmissive member is bonded, a second portion which is positioned to surround the first portion, and a third portion which is positioned to surround the second portion and has a lower surface to which the frame body is bonded. The upper surface of the first portion is positioned lower than an upper surface of the third portion. The second portion has a thin-walled portion positioned to surround the first portion, the thin-walled portion having a thickness thinner than that of the first portion as well as thinner than that of the third portion.

Abstract: A device for insulating an electrically conducting plane having a first electric potential relatively to a second electric potential is provided. The device comprises an insulating substrate including two parallel planar surfaces, and a first conducting outer layer and an electrostatic field reducer. The electrostatic field reducer reduces the value of the electrostatic field in a point of the peripheral edge, the reducer includes at least one conducting area distinct from the first outer layer, positioned on the first surface of the insulating substrate and/or in the insulating substrate. The reducer reduces the value of the electrostatic field in this point relative to the value of the electrostatic field in this point in the absence of the conducting area. The conducting area has a potential with a value strictly comprised between the values of the first and second potentials.