Patents by Inventor Michio Morioka

Michio Morioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020156570
    Abstract: The present invention is characterized in that the car navigation system for, at the time of desiring map information, traffic information, and other required information in a car, inquiring an information distribution service provider for distribution the information is composed of a moving terminal device which can be operated by inputting and outputting voice, a communication device, an audio interactive server which can input and output voice and data, is connected to an external device and the Internet on the basis of audio interactions by the voice recognition process and voice synthesis process, and executes information transfer, and one or a plurality of information distribution service providers connected to the Internet for distributing information such as map information and traffic information.
    Type: Application
    Filed: February 26, 2002
    Publication date: October 24, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Shinya Ohtsuji, Soshiro Kuzunuki, Mariko Okude, Tadashi Kamiwaki, Michio Morioka, Akio Amano, Toshihiro Kujirai, Makoto Shioya, Manabu Niie
  • Publication number: 20020056092
    Abstract: An information receiver comprising a unit receiving information having a package number identifying the information, a first storage section where said package number is stored, a second storage section where reception information indicating whether or not said information associated with said package number was received, and a third storage section where display information indicating whether or not said information associated with said package number was displayed.
    Type: Application
    Filed: March 25, 1999
    Publication date: May 9, 2002
    Inventors: SHIGEKI HIRASAWA, YUICHI YAGAWA, EIICHI YUKINO, MICHIO MORIOKA, TORU YAMADA, NOBUKAGE TAKAHASHI
  • Publication number: 20020032521
    Abstract: A terminal apparatus has a simple map installed therein. When a map is desired, it is checked whether or not a map of a desired place exists in the simple map. If it exists, the map of the desired place is loaded from the simple map, or if it does not exist, the map of the desired place is downloaded from a navigation server.
    Type: Application
    Filed: September 12, 2001
    Publication date: March 14, 2002
    Inventors: Kimiyoshi Machii, Shigeru Matsuo, Katsuaki Tanaka, Yoshinori Endo, Mariko Okude, Michio Morioka
  • Publication number: 20020016854
    Abstract: In an information sending and receiving system in which an information sending equipment and at least one information receiving equipment send and receive information through a transmission medium, a management message is sent from the information sending equipment to the information receiving equipment thereby to create a list of a content code expressing a data message registered on the information receiving equipment side within the information receiving equipment. Then, a data message containing a content code and data is transmitted from the information sending equipment to the information receiving equipment. The information receiving equipment selects a data message by comparing a content code of a data message and a list of its own content code. The content code list may be created within the information sending equipment based on a property value in an answer message from the information receiving equipment.
    Type: Application
    Filed: September 18, 2001
    Publication date: February 7, 2002
    Inventors: Shigeki Hirasawa, Michio Morioka, Tadashi Kuwabara, Tomochika Ozaki, Yuichi Yagawa, Akio Yajima
  • Patent number: 6314467
    Abstract: In an information sending and receiving system in which an information sending equipment and at least one information receiving equipment send and receive information through a transmission medium, a management message is sent from the information sending equipment to the information receiving equipment thereby to create a list of a content code expressing a data message registered on the information receiving equipment side within the information receiving equipment. Then, a data message containing a content code and data is transmitted from the information sending equipment to the information receiving equipment. The information receiving equipment selects a data message by comparing a content code of a data message and a list of its own content code. The content code list may be created within the information sending equipment based on a property value in an answer message from the information receiving equipment.
    Type: Grant
    Filed: December 11, 1997
    Date of Patent: November 6, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Shigeki Hirasawa, Michio Morioka, Tadashi Kuwabara, Tomochika Ozaki, Yuichi Yagawa, Akio Yajima
  • Patent number: 5748873
    Abstract: A highly reliable computer system is intended to duplicate processors, compare the outputs of the processors with each other and enhance the validity of the output of processor system. If a mismatch between the outputs is detected, one of the processors performs a process of saving an internal state of the processor in amain memory and diagnosing factor of the detected mismatch. If the process is recognized to be continued in a duplex mode, the processors are re-synchronized by a processor reset, and initialize themselves and restore the internal information saved in the main memory for continuing the process having been proceeded before the fault occurred.
    Type: Grant
    Filed: July 26, 1996
    Date of Patent: May 5, 1998
    Assignee: Hitachi,Ltd.
    Inventors: Hiroshi Ohguro, Koichi Ikeda, Takaaki Nishiyama, Hiroshi Iwamoto, Kenichi Kurosawa, Tetsuaki Nakamikawa, Michio Morioka
  • Patent number: 5699541
    Abstract: A computer memory system is disclosed with an input/output circuitry capable of separating the load separating the load capacitance of an output circuit of a semiconductor memory connected to a memory bus from the memory bus. In order to separate the load capacitance of a semiconductor memory connected to a memory bus signal line, a Schottky diode is arranged between the semiconductor memory and the memory bus line, and a voltage control circuit is provided to control whether a reverse bias voltage is applied to the Schottky diode. The speed of signal transmission does not decrease even when a large number of semiconductor memories are connected to the memory bus since the load capacitance of the semiconductor memories is separated from the bus. Therefore, it is possible to construct a high speed and large capacity memory system.
    Type: Grant
    Filed: March 20, 1995
    Date of Patent: December 16, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Kenichi Kurosawa, Shin Kokura, Michio Morioka, Tetsuaki Nakamikawa, Sakou Ishikawa
  • Patent number: 5623626
    Abstract: A logical cache memory has a logical tag and a physical tag as address tags for comparison, and status information representing their status. Data status and block status are registered at the same entry position. When access is made using a logical address, access is made to the logical tag to detect the existence of data, and when access is made using a physical address, access is made to the physical tag using an offset portion which does not depend on address conversion, to detect the existence of data.
    Type: Grant
    Filed: May 15, 1995
    Date of Patent: April 22, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Michio Morioka, Tadaaki Bandoh, Masayuki Tanji