Patents by Inventor Michitaka Kimura
Michitaka Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10098179Abstract: A compact electronic device as a constituent element of a wireless communication system using a sensor. A first feature of the device is that a first semiconductor chip is bare-chip-mounted over a front surface of a first wiring board in the form of a chip and a second semiconductor chip is bare-chip-mounted over a second wiring board in the form of a chip. A second feature is that a wireless communication unit and a data processing unit which configure a module are separately mounted. A third feature is that the first and second wiring boards are stacked in the board thickness direction to make up the module (electronic device).Type: GrantFiled: April 22, 2014Date of Patent: October 9, 2018Assignee: Renesas Electronics CorporationInventors: Shintaro Yamamichi, Hirokazu Honda, Masaki Watanabe, Junichi Arita, Norio Okada, Jun Ueno, Masashi Nishimoto, Michitaka Kimura, Tomohiro Nishiyama
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Patent number: 10037966Abstract: The joint reliability in flip chip bonding of a semiconductor device is enhanced. Prior to flip chip bonding, flux 9 is applied to the solder bumps 5a for flip chip bonding over a substrate and reflow/cleaning is carried out and then flip chip bonding is carried out. This makes is possible to thin the oxide film over the surfaces of the solder bumps 5a and make the oxide film uniform. As a result, it is possible to suppress the production of local solder protrusions to reduce the production of solder bridges during flip chip bonding and enhance the joint reliability in the flip chip bonding of the semiconductor device.Type: GrantFiled: December 9, 2016Date of Patent: July 31, 2018Assignee: Renesas Electronics CorporationInventors: Toshihiro Iwasaki, Takeumi Kato, Takanori Okita, Yoshikazu Shimote, Shinji Baba, Kazuyuki Nakagawa, Michitaka Kimura
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Publication number: 20170092614Abstract: The joint reliability in flip chip bonding of a semiconductor device is enhanced. Prior to flip chip bonding, flux 9 is applied to the solder bumps 5a for flip chip bonding over a substrate and reflow/cleaning is carried out and then flip chip bonding is carried out. This makes is possible to thin the oxide film over the surfaces of the solder bumps 5a and make the oxide film uniform. As a result, it is possible to suppress the production of local solder protrusions to reduce the production of solder bridges during flip chip bonding and enhance the joint reliability in the flip chip bonding of the semiconductor device.Type: ApplicationFiled: December 9, 2016Publication date: March 30, 2017Inventors: Toshihiro IWASAKI, Takeumi KATO, Takanori OKITA, Yoshikazu SHIMOTE, Shinji BABA, Kazuyuki NAKAGAWA, Michitaka KIMURA
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Publication number: 20140329476Abstract: A compact electronic device as a constituent element of a wireless communication system using a sensor. A first feature of the device is that a first semiconductor chip is bare-chip-mounted over a front surface of a first wiring board in the form of a chip and a second semiconductor chip is bare-chip-mounted over a second wiring board in the form of a chip. A second feature is that a wireless communication unit and a data processing unit which configure a module are separately mounted. A third feature is that the first and second wiring boards are stacked in the board thickness direction to make up the module (electronic device).Type: ApplicationFiled: April 22, 2014Publication date: November 6, 2014Applicants: RENESAS ELECTRONICS CORPORATION, RENESAS ELECTRONICS CORPORATIONInventors: Shintaro YAMAMICHI, Hirokazu HONDA, Masaki WATANABE, Junichi ARITA, Norio OKADA, Jun UENO, Masashi NISHIMOTO, Michitaka KIMURA, Tomohiro NISHIYAMA
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Patent number: 8426303Abstract: A semiconductor device with improved quality and reliability is provided. In a UBM formed over an electrode pad located over a semiconductor substrate, the edge (end) of an Au film as an upper layer is located inside or in the same position as the edge (end) of a TiW film as a lower layer, which can suppress the formation of a suspended part in the Au film. This arrangement can prevent the occurrence of electrical short circuit between the adjacent pads due to the suspended part and the adhesion of the suspended part as foreign matter to the semiconductor substrate, thus improving the quality and reliability of the semiconductor device (semiconductor chip).Type: GrantFiled: May 19, 2011Date of Patent: April 23, 2013Assignee: Renesas Electronics CorporationInventors: Zenzo Suzuki, Michitaka Kimura
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Publication number: 20120098126Abstract: The joint reliability in flip chip bonding of a semiconductor device is enhanced. Prior to flip chip bonding, flux 9 is applied to the solder bumps 5a for flip chip bonding over a substrate and reflow/cleaning is carried out and then flip chip bonding is carried out. This makes is possible to thin the oxide film over the surfaces of the solder bumps 5a and make the oxide film uniform. As a result, it is possible to suppress the production of local solder protrusions to reduce the production of solder bridges during flip chip bonding and enhance the joint reliability in the flip chip bonding of the semiconductor device.Type: ApplicationFiled: October 14, 2011Publication date: April 26, 2012Inventors: Toshihiro IWASAKI, Takeumi KATO, Takanori OKITA, Yoshikazu SHIMOTE, Shinji BABA, Kazuyuki NAKAGAWA, Michitaka KIMURA
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Publication number: 20110291270Abstract: A semiconductor device with improved quality and reliability is provided. In a UBM formed over an electrode pad located over a semiconductor substrate, the edge (end) of an Au film as an upper layer is located inside or in the same position as the edge (end) of a TiW film as a lower layer, which can suppress the formation of a suspended part in the Au film. This arrangement can prevent the occurrence of electrical short circuit between the adjacent pads due to the suspended part and the adhesion of the suspended part as foreign matter to the semiconductor substrate, thus improving the quality and reliability of the semiconductor device (semiconductor chip).Type: ApplicationFiled: May 19, 2011Publication date: December 1, 2011Inventors: Zenzo SUZUKI, Michitaka KIMURA
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Patent number: 7745258Abstract: A manufacturing method of the semiconductor device including a step of forming solder balls on the circuit face of a mother chip, a step of making flip chip bonding of the daughter chip after the step of forming solder balls on the circuit face of the mother chip, and a step of making flip chip bonding of the mother chip on a circuit board using the solder balls.Type: GrantFiled: July 14, 2008Date of Patent: June 29, 2010Assignee: Renesas Technology Corp.Inventors: Toshihiro Iwasaki, Michitaka Kimura, Kozo Harada
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Publication number: 20080274590Abstract: A manufacturing method of the semiconductor device including a step of forming solder balls on the circuit face of a mother chip, a step of making flip chip bonding of the daughter chip after the step of forming solder balls on the circuit face of the mother chip, and a step of making flip chip bonding of the mother chip on a circuit board using the solder balls.Type: ApplicationFiled: July 14, 2008Publication date: November 6, 2008Applicant: Renesas Technology Corp.Inventors: Toshihiro Iwasaki, Michitaka Kimura, Kozo Harada
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Patent number: 7443036Abstract: The manufacturing method of the semiconductor device of the present invention has a step forming solder balls on the circuit face of a mother chip, a step making flip chip bonding of the daughter chip after the step forming solder balls on the circuit face of the mother chip, and a step making flip chip bonding of the mother chip on a circuit board using the solder balls.Type: GrantFiled: October 4, 2005Date of Patent: October 28, 2008Assignee: Renesas Technology Corp.Inventors: Toshihiro Iwasaki, Michitaka Kimura, Kozo Harada
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Publication number: 20060134832Abstract: The manufacturing method of the semiconductor device of the present invention has a step forming solder balls on the circuit face of a mother chip, a step making flip chip bonding of the daughter chip after the step forming solder balls on the circuit face of the mother chip, and a step making flip chip bonding of the mother chip on a circuit board using the solder balls.Type: ApplicationFiled: October 4, 2005Publication date: June 22, 2006Applicant: Renesas Technology Corp.Inventors: Toshihiro Iwasaki, Michitaka Kimura, Kozo Harada
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Publication number: 20050082663Abstract: A semiconductor device includes a flexible printed circuit board which is formed into a cylindrical shape so that a heat releasing space is formed therein, a plurality of semiconductor elements which are mounted on the inner surface of the flexible printed circuit board via inner bumps, and an external electrode (external terminal) which is provided on the flexible printed circuit board and which connects a wire on the flexible printed circuit board to an external wire on a mounting board. Herein, the heat releasing space is provided with a cooler for cooling the space.Type: ApplicationFiled: October 14, 2004Publication date: April 21, 2005Inventors: Satoru Wakiyama, Kozo Harada, Michitaka Kimura
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Patent number: 6856028Abstract: In a semiconductor device, a semiconductor element is bonded to an insulating circuit board. A resin layer for bonding the semiconductor element to the insulating circuit board is extended so as to become greater in size than the semiconductor element. Further, the surroundings of the semiconductor element are sealed with resin. Reliability of mounting is improved by alleviating stress developing in a solder joint of the external electrodes of the circuit board.Type: GrantFiled: September 20, 2000Date of Patent: February 15, 2005Assignee: Renesas Technology Corp.Inventors: Kazuyuki Nakagawa, Michitaka Kimura, Masatoshi Yasunaga
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Patent number: 6777814Abstract: A semiconductor device includes a semiconductor chip, and a circuit substrate disposed such that the circuit substrate faces the semiconductor chip and is electrically connected to the semiconductor chip through a connection conductor. A pad electrode and a terminal electrode are formed on a surface of the semiconductor chip and a surface of the circuit substrate, respectively. The connection conductor is connected between the pad electrode and the terminal electrode. The surface of the semiconductor and the surface of the circuit substrate face each other. A conductive dummy pattern is formed on the facing surface of the semiconductor chip or the circuit substrate. A space between the facing surfaces is filled with nonconductive resin. With this arrangement, it is possible to make uniform the temperature distribution between the facing surfaces, thereby making the temperature and the viscosity of the nonconductive resin uniform to reduce attenuation of ultrasonic waves.Type: GrantFiled: June 14, 2002Date of Patent: August 17, 2004Assignee: Renesas Technology Corp.Inventors: Toshihiro Iwasaki, Michitaka Kimura, Keiichiro Wakamiya, Yasumichi Hatanaka
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Patent number: 6768516Abstract: The invention is intended for rendering a CMOS camera compact and less costly. A semiconductor device constituting a CMOS camera system includes a lens unit which includes a wiring board having an image pick-up opening formed therein and a lens, and the lens is provided on one side of the wiring board and positioned opposite the image pick-up opening. An image pick-up semiconductor is provided on the other side of the wiring board, and is positioned opposite the image pick-up opening, and is connected to a connection section of the wiring board by means of flip-chip bonding. An image processing semiconductor is connected by means of flip-chip bonding to another connection section provided on the other side of the wiring board, and processes an image signal output from the image pick-up semiconductor.Type: GrantFiled: December 11, 2000Date of Patent: July 27, 2004Assignee: Renesas Technology Corp.Inventors: Satoshi Yamada, Michitaka Kimura, Naoto Ueda, Masatoshi Yasunaga
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Patent number: 6756686Abstract: A semiconductor device includes a first substrate, a second substrate, a plurality of conductors, and supporting members. The first substrate has a plurality of electrode portions disposed on one side thereof. The second substrate has a plurality of electrode portions disposed on one side thereof. The conductors are for connecting the plurality of electrode portions of the first substrate to the plurality of electrode portions of the second substrate. The supporting members supporting the first substrate and the second substrate are disposed on a location where resonance caused by ultrasonic oscillation externally supplied is restrained in the state where the first substrate is connected to the second substrate. The supporting members prevent irregular oscillation and resonance caused by the ultrasonic oscillation.Type: GrantFiled: August 21, 2002Date of Patent: June 29, 2004Assignee: Renesas Technology Corp.Inventors: Toshihiro Iwasaki, Keiichiro Wakamiya, Michitaka Kimura, Yasumichi Hatanaka
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Patent number: 6677677Abstract: The semiconductor device has a flip chip structure. The chip is electrically connected to the chip mounting member via function bumps provided on the chip. Dummy bumps acting against a local bending force of the chip are interposed between the chip and the chip mounting member.Type: GrantFiled: March 27, 2002Date of Patent: January 13, 2004Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Michitaka Kimura, Toshihiro Iwasaki, Yasumichi Hatanaka, Keiichiro Wakamiya
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Publication number: 20030111742Abstract: The present invention comprises: a semiconductor chip; a circuit substrate disposed such that the circuit substrate faces the semiconductor chip and is electrically connected to the semiconductor chip through a connection conductor; a pad electrode and a terminal electrode formed on a surface of the semiconductor chip and a surface of the circuit substrate, respectively, and having the connection conductor connected thereto, the surface of the semiconductor and the surface of the circuit substrate facing each other; nonconductive resin formed such that the nonconductive resin fills a space between the facing surfaces; and a conductive dummy pattern formed on the facing surface of the semiconductor chip or the circuit substrate, the conductive dummy pattern having a predetermined shape.Type: ApplicationFiled: June 14, 2002Publication date: June 19, 2003Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Toshihiro Iwasaki, Michitaka Kimura, Keiichiro Wakamiya, Yasumichi Hatanaka
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Patent number: 6544814Abstract: A plurality of semiconductor chips are mounted on an insulating substrate with bumps and through use of dielectric resin for mounting purposes. The semiconductor chips are sealed with transfer mold resin through a single operation while remaining on the insulating substrate. Then, the plurality of semiconductor chips are separated together with the insulating substrate and the mounting resin into individual semiconductor devices. The productivity and reliability of packaged semiconductor devices is improved.Type: GrantFiled: January 31, 2000Date of Patent: April 8, 2003Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Masatoshi Yasunaga, Michitaka Kimura, Satoshi Yamada
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Publication number: 20030057569Abstract: A semiconductor device is used which is provided with a semiconductor chip having Au bumps on its surface and a chip-mounting substrate having external electrode lands on its chip-mounting face while having external electrode pads on its external connection face and constituted by bonding Au bumps on the semiconductor chip to internal electrode pads on the chip-mounting substrate while turning the semiconductor chip upside down, in which external electrode lands are arranged in areas corresponding to arrangement areas of internal electrode pads at the both sides of the chip-mounting substrate.Type: ApplicationFiled: March 6, 2002Publication date: March 27, 2003Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Keiichiro Wakamiya, Toshihiro Iwasaki, Michitaka Kimura, Yasumichi Hatanaka