Patents by Inventor Michitaka Okuno
Michitaka Okuno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140010068Abstract: Between network node apparatuses that operate as a duplex system, when a failure occurs in an information processing unit of one system, the service is maintained and continued in an information processing unit of the other system without interruption of the service. In a system using an active system network node apparatus 100-1 and a standby system network node apparatus 100-2 both in an operating state, a switch processing unit 110 has a transfer processing unit 112 that copies and transfers a packet flow to be a subject of information processing in the information processing unit 200 to two output destinations, when the switch processing unit operates as an active system.Type: ApplicationFiled: March 23, 2011Publication date: January 9, 2014Applicant: Hitachi, Ltd.Inventors: Michitaka Okuno, Takeki Yazaki
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Patent number: 8401384Abstract: Provided is an optical access system, including: an optical line terminal, a plurality of optical network units and an optical switching unit. The optical line terminal sends to the optical switching unit a control frame including a switching time when the optical switching unit is to make a switch from one of the optical communication paths between the optical line terminal and the plurality of optical network units to another, and an identifier of an optical communication path to which the switch is made in order to switch the optical communication paths between the optical line terminal and the plurality of optical network units. The optical switching unit switches the optical communication paths between the optical line terminal and the plurality of optical network units based on the switching time and the identifier of the optical communication path after switching which are included in the control frame.Type: GrantFiled: July 16, 2009Date of Patent: March 19, 2013Assignee: Hitachi, Ltd.Inventors: Koji Wakayama, Hiroki Ikeda, Michitaka Okuno, Kenichi Sakamoto
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Patent number: 8380065Abstract: Provided is an optical access system comprising: an optical line terminal connected to another network; a plurality of optical network units, each connected to a user terminal; and at least one of an optical switching unit and an optical splitter, which is installed between the optical line terminal and the plurality of optical network units. The optical line terminal allocates a length of time to a discovery phase for detecting the plurality of optical network units, and a length of time to data transmission phases for transferring data from the plurality of optical network units; and changes a ratio of the length of time of the discovery phase to the length of time of the data transmission phases so that the length of time of the discovery phase is shortened in the case where a number of the optical network units that are registered in the optical line terminal increase.Type: GrantFiled: October 20, 2009Date of Patent: February 19, 2013Assignee: Hitachi, Ltd.Inventors: Michitaka Okuno, Koji Wakayama, Kenichi Sakamoto, Hiroki Ikeda
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Publication number: 20120314608Abstract: In a distributed information communication processing system in which a plurality of information communication devices provides a service through a network, response speed, electric power consumption, and further reliability are improved. The distributed information communication processing system which provides various services is configured by associating an entrance node (EN) which executes filtering near sensors, actuators, and terminals being information sources, an intelligent node (IN) which changes an information processing position and executes information processing and communication processing instead of a data center (DC), and a management node (MN) which manages these nodes. Thereby, real time type information processing can be realized.Type: ApplicationFiled: February 18, 2010Publication date: December 13, 2012Applicant: HITACHI, LTD.Inventors: Michitaka Okuno, Shinji Nishimura, Hidetaka Aoki, Yuji Tsushima, Takeki Yazaki, Yuji Ogata
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Patent number: 8135004Abstract: Disclosed herewith is a multi-plane cell switch fabric system in which each switching unit functions asynchronously with others. The system executes distribution/restoration operations without lowering the switching capacity to reorder cells that arrive in random order from a plurality of switches just as they were in original flows and packets respectively with a small hardware capacity. In the system, the distribution unit divides each variable length packet addressed to the same destination into fixed length cells and sends those divided cells by a unit of integer multiple of the number of switches. On the other hand, the reordering unit, while holding cells that arrive in random order from each switching unit (switching units 1 to M) in a receive buffer, separates only the header information from each cell and holds the header information in a retry queue.Type: GrantFiled: January 29, 2008Date of Patent: March 13, 2012Assignee: Hitachi, Ltd.Inventor: Michitaka Okuno
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Patent number: 8116305Abstract: A multi-plane cell switch fabric system prevents a decrease of the effective switching capacity when switching the variable-length packets. Distribution units classify input variable-length packets for each address, arranges the packets by a first division length unit, divides the packets into fixed-length cell payloads by a second division length unit that is an integer multiple being twice or more as large as the first division length unit, and forms a fixed-length cell by providing destination information, a source ID, a sequential number, and packet head tail information to each of the cell payloads. The cells are distributed to all the switching units one by one whenever the cells are collected to be the same number as the plural switching units. The reordering units classify the cells, reorder the sequential number in an original order, and reassemble the packets by the packet head tail information of the cell.Type: GrantFiled: March 25, 2009Date of Patent: February 14, 2012Assignee: Alaxala Networks CorporationInventors: Michitaka Okuno, Mitsuo Yamamoto, Isao Kimura
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Patent number: 8095721Abstract: A network switch with a plurality of crossbar switches that is available to suppress increase in the circuit scale is provided. The network switch has: the plurality of crossbar switches that transfer unit data in a specified format; a receiving side transfer unit that transfers data received from a network to the plurality of crossbar switches in the unit data basis; and a plurality of transmitting side transfer units that transmit data transferred from the plurality of crossbar switches to the network. The receiving side transfer sets a consecutive serial number to the unit data in transfer sequence, and distributes the unit data to the plurality of crossbar switches. Each of the plurality of transmitting side transfer units has a plurality of queues for the respective crossbar switches that stores the transferred unit data, and extracts the unit data with smallest serial number of the unit data stored in the queues when all of the queues store the unit data.Type: GrantFiled: November 24, 2008Date of Patent: January 10, 2012Assignee: ALAXALA Networks CorporationInventors: Isao Kimura, Mitsuo Yamamoto, Michitaka Okuno
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Publication number: 20110202658Abstract: A system permitting alteration of the information processing position, where an existing information system is used, while minimizing alterations in configuration or the like, is to be provided. Intelligent nodes each having an information processing section and any desired address altering section are arranged on boundaries of a network where packets are likely to pass. This node has a flow table for recognizing as a flow a group of packets transmitted from each user's terminal, a flow status table for determining the connection state and the next destination address or the final destination address of each flow, and a module to observe the loaded state of its own information processing function. It rewrites the destination address of any flow not in a connection-established state in the flow status table to a less loaded one out of its own information processing function section or external information processing apparatus.Type: ApplicationFiled: February 16, 2011Publication date: August 18, 2011Inventors: Michitaka OKUNO, Takeki Yazaki, Yuji Tsushima, Hidetaka Aoki
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Patent number: 7907606Abstract: Cells which arrive in random sequence from the asynchronously operating exchange parts are restored into the original by a small amount of hardware. Distributing parts as inputs of a switch fabric manage serial numbers continuous for each destination. The distributing part divides an inputted variable length packet into fixed length cells, adds serial numbers corresponding to destinations to the cells, and outputs the cells to the exchange parts. The respective exchange parts deliver the cells to the objected destinations. Alignment parts as outputs of the switch fabric classify the reception cells by the number of the distributing part, and compare an expected serial number managed by the alignment part with a serial number of the destination (alignment part) of the reception cell. An identical one is stored in an aligned FIFO queue, and cells of from a packet start cell to a packet end cell are taken out.Type: GrantFiled: November 19, 2008Date of Patent: March 15, 2011Assignee: ALAXALA Networks CorporationInventors: Michitaka Okuno, Mitsuo Yamamoto, Isao Kimura
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Publication number: 20100104286Abstract: Provided is an optical access system comprising: an optical line terminal connected to another network; a plurality of optical network units, each connected to a user terminal; and at least one of an optical switching unit and an optical splitter, which is installed between the optical line terminal and the plurality of optical network units. The optical line terminal allocates a length of time to a discovery phase for detecting the plurality of optical network units, and a length of time to data transmission phases for transferring data from the plurality of optical network units; and changes a ratio of the length of time of the discovery phase to the length of time of the data transmission phases so that the length of time of the discovery phase is shortened in the case where a number of the optical network units that are registered in the optical line terminal increase.Type: ApplicationFiled: October 20, 2009Publication date: April 29, 2010Applicant: HITACHI, LTD.Inventors: Michitaka OKUNO, Koji WAKAYAMA, Kenichi SAKAMOTO, Hiroki IKEDA
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Patent number: 7656887Abstract: A function block containing a process-cache tag for storing process-cache tags in the pre-stage of a process cache and an FIFO queue for each tag entry are installed as a traffic controller. The traffic controller stacks packet groups, identified as being from the same flow, in the same FIFO queue. Each FIFO queue records the logged state of the corresponding process queues, and when a packet arrives at an FIFO queue entry in a non-registered state, only its first packet is conveyed to a function block for processing the process-cache misses, and then it awaits registration in a process cache. Access to the process cache from the FIFO queue is implemented at the time that registration of the second and subsequent packets in the process cache are completed. This allows packets other than the first packet in the flow to always access the process cache for a cache hit.Type: GrantFiled: August 3, 2005Date of Patent: February 2, 2010Assignee: Hitachi, Ltd.Inventor: Michitaka Okuno
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Publication number: 20100021160Abstract: Provided is an optical access system, including: an optical line terminal, a plurality of optical network units and an optical switching unit. The optical line terminal sends to the optical switching unit a control frame including a switching time when the optical switching unit is to make a switch from one of the optical communication paths between the optical line terminal and the plurality of optical network units to another, and an identifier of an optical communication path to which the switch is made in order to switch the optical communication paths between the optical line terminal and the plurality of optical network units. The optical switching unit switches the optical communication paths between the optical line terminal and the plurality of optical network units based on the switching time and the identifier of the optical communication path after switching which are included in the control frame.Type: ApplicationFiled: July 16, 2009Publication date: January 28, 2010Applicant: HITACHI, LTD.Inventors: Koji WAKAYAMA, Hiroki IKEDA, Michitaka OKUNO, Kenichi SAKAMOTO
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Patent number: 7630373Abstract: In a packet transfer apparatus, a larger number of entries can be registered to routing tables without increasing the overall memory volume required for the routing tables to record transfer information of packets. A routing table search is conducted at a high speed. Each line card of the packet transfer apparatus includes two kinds of routing tables, i.e., first and second routing tables having mutually different functions. The first routing tables are local routing tables to record frequently used transfer information in groups. The second routing tables are shared distributed routing tables and record the transfer information in a distributed way without an overlapped part of the transfer information between the line cards. The sum of the distributed transfer information matches the overall transfer information kept in the packet transfer apparatus.Type: GrantFiled: April 26, 2006Date of Patent: December 8, 2009Assignee: Hitachi, Ltd.Inventor: Michitaka Okuno
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Publication number: 20090252168Abstract: A multi-plane cell switch fabric system prevents a decrease of the effective switching capacity when switching the variable-length packets. Distribution units classify input variable-length packets for each address, arranges the packets by a first division length unit, divides the packets into fixed-length cell payloads by a second division length unit that is an integer multiple being twice or more as large as the first division length unit, and forms a fixed-length cell by providing destination information, a source ID, a sequential number, and packet head tail information to each of the cell payloads. The cells are distributed to all the switching units one by one whenever the cells are collected to be the same number as the plural switching units. The reordering units classify the cells, reorder the sequential number in an original order, and reassemble the packets by the packet head tail information of the cell.Type: ApplicationFiled: March 25, 2009Publication date: October 8, 2009Applicant: ALAXALA Networks CorporationInventors: Michitaka OKUNO, Mitsuo YAMAMOTO, Isao KIMURA
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Publication number: 20090198864Abstract: A network switch with a plurality of crossbar switches that is available to suppress increase in the circuit scale is provided. The network switch has: the plurality of crossbar switches that transfer unit data in a specified format; a receiving side transfer unit that transfers data received from a network to the plurality of crossbar switches in the unit data basis; and a plurality of transmitting side transfer units that transmit data transferred from the plurality of crossbar switches to the network. The receiving side transfer sets a consecutive serial number to the unit data in transfer sequence, and distributes the unit data to the plurality of crossbar switches. Each of the plurality of transmitting side transfer units has a plurality of queues for the respective crossbar switches that stores the transferred unit data, and extracts the unit data with smallest serial number of the unit data stored in the queues when all of the queues store the unit data.Type: ApplicationFiled: November 24, 2008Publication date: August 6, 2009Inventors: Isao Kimura, Mitsuo Yamamoto, Michitaka Okuno
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Publication number: 20090129393Abstract: Cells which arrive in random sequence from the asynchronously operating exchange parts are restored into the original by a small amount of hardware. Distributing parts as inputs of a switch fabric manage serial numbers continuous for each destination. The distributing part divides an inputted variable length packet into fixed length cells, adds serial numbers corresponding to destinations to the cells, and outputs the cells to the exchange parts. The respective exchange parts deliver the cells to the objected destinations. Alignment parts as outputs of the switch fabric classify the reception cells by the number of the distributing part, and compare an expected serial number managed by the alignment part with a serial number of the destination (alignment part) of the reception cell. An identical one is stored in an aligned FIFO queue, and cells of from a packet start cell to a packet end cell are taken out.Type: ApplicationFiled: November 19, 2008Publication date: May 21, 2009Inventors: Michitaka OKUNO, Mitsuo Yamamoto, Isao Kimura
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Patent number: 7529251Abstract: A high quality network is provided that eliminates the sorting time for sorting through registering look-up conditions, such as source and destination MAC addresses, in a content addressable memory, by generating a routing or flow control look-up key, and then selectively activating some of the physical banks in the content addressable memory with the look-up key during look-up for the look-up conditions. The look-up key is generated by extracting a part or all of the data contained in a packet header.Type: GrantFiled: August 26, 2005Date of Patent: May 5, 2009Assignee: Hitachi, Ltd.Inventors: Tomoyuki Oku, Takeki Yazaki, Michitaka Okuno, Minoru Hidaka, Shinichi Akahane
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Publication number: 20080279195Abstract: Disclosed herewith is a multi-plane cell switch fabric system in which each switching unit functions asynchronously with others. The system executes distribution/restoration operations without lowering the switching capacity to reorder cells that arrive in random order from a plurality of switches just as they were in original flows and packets respectively with a small hardware capacity. In the system, the distribution unit divides each variable length packet addressed to the same destination into fixed length cells and sends those divided cells by a unit of integer multiple of the number of switches. On the other hand, the reordering unit, while holding cells that arrive in random order from each switching unit (switching units 1 to M) in a receive buffer, separates only the header information from each cell and holds the header information in a retry queue.Type: ApplicationFiled: January 29, 2008Publication date: November 13, 2008Inventor: Michitaka Okuno
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Patent number: 7440457Abstract: In order to perform cache processing for the received packets, a network apparatus is provided with a network-processor accelerator for caching the process result of a network processor. Accordingly, the network apparatus of the present invention ensuring higher packet-processing throughput can be realized by improving the packet-processing throughput without increase in the chip area, increase in the power consumption, and shortage in an external connected memory bandwidth.Type: GrantFiled: October 4, 2004Date of Patent: October 21, 2008Assignee: Hitachi, Ltd.Inventor: Michitaka Okuno
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Publication number: 20080159149Abstract: In a congestion state where a specific destination in a switch fabric is congested, high priority data is allowed to pass at a low delay or high throughput while in a non-congestion state where the specific destination in the switch fabric is not congested, full use of switching bandwidth is made regardless of priority.Type: ApplicationFiled: July 23, 2007Publication date: July 3, 2008Inventor: Michitaka Okuno