Patents by Inventor Michiyuki Shimizu

Michiyuki Shimizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6788996
    Abstract: To reduce the manufacturing time in a production line for a semiconductor integrated circuit device, plural wafers in a lot are divided into a number of groups according to a selected number of manufacturing devices to be used for further processing of the wafers. Each group of wafers is allocated to a respective one of plural manufacturing devices in a state in which each group is housed in a respective one of plural division carriers and one sheet processing is applied to the wafer groups in the plural manufacturing devices in parallel.
    Type: Grant
    Filed: March 7, 2002
    Date of Patent: September 7, 2004
    Assignee: Renesas Technology Corp.
    Inventor: Michiyuki Shimizu
  • Publication number: 20020155705
    Abstract: To reduce manufacturing time in a production line for a semiconductor integrated circuit device, plural wafers in a lot are divided into the same number according to the number of manufacturing devices. Each group of the divided wafers is allocated to each of plural manufacturing devices in a state that each group is housed in each of plural division carriers and one sheet processing is applied to the wafer in the plural manufacturing devices in parallel.
    Type: Application
    Filed: March 7, 2002
    Publication date: October 24, 2002
    Inventor: Michiyuki Shimizu