Patents by Inventor Mihir Wagh

Mihir Wagh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods and apparatus for limiting a number of current changes while clock gating to manage power consumption of processor modules
    Patent number: 9753524
    Abstract: A dispatch module implemented in at least one of a memory or a processing device is operatively coupled to multiple processing modules, each having a first clock configuration and a second clock configuration. The dispatch module, at a first time, changes a first processing module included in the multiple processing modules from a first clock configuration to a second clock configuration. The dispatch module prohibits, at a second time within a predetermined time period and after the first time, a second processing module included in the multiple processing modules from changing from the first clock configuration to the second clock configuration if an indicator associated with a number of changes of the multiple processing modules between a first clock configuration and a second clock configuration within the predetermined time period and prior to the second time satisfies a criterion.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: September 5, 2017
    Assignee: Juniper Networks, Inc.
    Inventors: Vaishali Kulkarni, Jeffrey G. Libby, Mihir Wagh
  • Methods and apparatus for limiting a number of current changes while clock gating to manage power consumption of processor modules
    Patent number: 9477257
    Abstract: A dispatch module implemented in at least one of a memory or a processing device is operatively coupled to multiple processing modules, each having a first clock configuration and a second clock configuration. The dispatch module, at a first time, changes a first processing module included in the multiple processing modules from a first clock configuration to a second clock configuration. The dispatch module prohibits, at a second time within a predetermined time period and after the first time, a second processing module included in the multiple processing modules from changing from the first clock configuration to the second clock configuration if an indicator associated with a number of changes of the multiple processing modules between a first clock configuration and a second clock configuration within the predetermined time period and prior to the second time satisfies a criterion.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: October 25, 2016
    Assignee: JUNIPER NETWORKS, INC.
    Inventors: Vaishali Kulkarni, Jeffrey G. Libby, Mihir Wagh