Patents by Inventor Mika Kirimoto

Mika Kirimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9963043
    Abstract: Degradation degree table is a degradation degree table that describes a degradation degree of a secondary battery when the secondary battery is charged or discharged at a prescribed current rate with prescribed frequency. Degradation degree table describes the degradation degree in each of a plurality of state of charge (SOC) regions obtained through division of an SOC range of the secondary battery into the plurality of regions. Upper limit current determining part determines an upper limit current value to be used as a current rate at a time of charge or discharge, based on an estimated SOC and a target degradation degree with reference to degradation degree table.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: May 8, 2018
    Assignee: SANYO ELECTRIC CO., LTD.
    Inventor: Mika Kirimoto
  • Publication number: 20160297318
    Abstract: Degradation degree table is a degradation degree table that describes a degradation degree of a secondary battery when the secondary battery is charged or discharged at a prescribed current rate with prescribed frequency. Degradation degree table describes the degradation degree in each of a plurality of state of charge (SOC) regions obtained through division of an SOC range of the secondary battery into the plurality of regions. Upper limit current determining part determines an upper limit current value to be used as a current rate at a time of charge or discharge, based on an estimated SOC and a target degradation degree with reference to degradation degree table.
    Type: Application
    Filed: December 10, 2014
    Publication date: October 13, 2016
    Inventor: MIKA KIRIMOTO
  • Publication number: 20130241480
    Abstract: Each of battery modules is provided with a range determiner and a voltage detector. The range determiner is connected to a battery via a transmission line, and the voltage detector is connected to the battery via a communication line. In the battery, a voltage calculator calculates a terminal voltage of each of battery cells using a determination result of a voltage range of the battery cell by the range determiner. A control value calculator calculates a battery control value using one of a terminal voltage of each of the battery cells detected by the voltage detector and the terminal voltage of the battery cell calculated by the voltage calculator.
    Type: Application
    Filed: September 10, 2012
    Publication date: September 19, 2013
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Mika KIRIMOTO, Hiroya MURAO, Shinya KATAOKA
  • Publication number: 20120313562
    Abstract: A battery control device is connected to a plurality of battery cells. The battery control device includes a voltage value calculator, a communicator, and a voltage value updater. The voltage value calculator calculates, based on a current flowing through a plurality of battery cells, a voltage of each battery cell. If the battery control device is connected to a charge control device, the communicator receives information relating to a voltage of each battery cell, which has been detected by a voltage detector in the charge control device, from the charge control device. The voltage value updater updates the voltage calculated by the voltage value calculator based on the voltage information received by the communicator.
    Type: Application
    Filed: February 24, 2011
    Publication date: December 13, 2012
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Hiroya Murao, Shinya Kataoka, Mika Kirimoto
  • Patent number: 7923969
    Abstract: A state-of-charge equalizing device equalizes the state of charge of each of cells connected in series to form an assembled battery, and comprises charging/discharging circuits connected in parallel to the respective cells to discharge and/or charge the respective cells, voltage measurement circuits connected to the respective charging/discharging circuits to measure the voltages across the respective cells, and a control circuit.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: April 12, 2011
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Hiroya Murao, Mika Kirimoto
  • Publication number: 20110006734
    Abstract: A device that equalizes state of charge of each of a plurality of cells connected in series which form an assembled battery includes a control circuit and a discharge circuit for discharging each cell. The control circuit includes a unit that derives, for each cell to be discharged having a state of charge evaluation value different from an equalization target value, a discharge time or discharge end value with which the state of charge of a cell to be discharged becomes equal to that of a cell not to be discharged, and a unit that starts the discharge by the discharge circuit 21 for the cell to be discharged, and thereafter ends the discharge by the discharge circuit for each cell to be discharged when the derived discharge time has elapsed or when the state of charge evaluation value reaches the derived discharge end value.
    Type: Application
    Filed: March 10, 2009
    Publication date: January 13, 2011
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Mika Kirimoto, Hiroya Murao
  • Publication number: 20090167248
    Abstract: A state-of-charge equalizing device equalizes the state of charge of each of cells connected in series to form an assembled battery, and comprises charging/discharging circuits connected in parallel to the respective cells to discharge and/or charge the respective cells, voltage measurement circuits connected to the respective charging/discharging circuits to measure the voltages across the respective cells, and a control circuit.
    Type: Application
    Filed: December 23, 2008
    Publication date: July 2, 2009
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Hiroya MURAO, Mika KIRIMOTO
  • Patent number: 7505912
    Abstract: An audio decoding device includes a playback speed change device for changing, with respect to a decoded audio signal obtained by a decoding device, the playback speed thereof; an output buffer for temporarily storing a digital audio signal outputted from the playback speed change device; a read out device for reading out the digital audio signals stored in the output buffer at predetermined time intervals; a playback speed control device for controlling the playback speed change device on the basis of the number of packets stored in the jitter buffer; and decoding timing control means for controlling the timing of decoding by the decoding device on the basis of the amount of data stored in the output buffer.
    Type: Grant
    Filed: September 29, 2003
    Date of Patent: March 17, 2009
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Kozo Okuda, Mika Kirimoto, Hiroyuki Hirai, Hiroki Onishi
  • Publication number: 20050237998
    Abstract: An audio decoding apparatus comprises packet order change control means, comprising packet rearranging storage means capable of storing one or a plurality of received packets, for outputting the packet which has been sent out in the earliest time from a transmission side, out of the packet received this time and the packets stored in the packet rearranging storage means, on the basis of order information related to the received packet and order information related to the packets stored in the packet rearranging storage means as well as storing in the packet rearranging storage means the packets excluding the outputted packet out of the received packet and the packets stored in the packet rearranging storage means; and an FIFO jitter buffer for sequentially storing the packets outputted from the packet order change control means as well as outputting the stored packets in the order inputted.
    Type: Application
    Filed: February 2, 2004
    Publication date: October 27, 2005
    Inventors: Kozo Okuda, Mika Kirimoto, Takashi Iida
  • Publication number: 20040204945
    Abstract: An audio decoding device includes a playback speed change device for changing, with respect to a decoded audio signal obtained by a decoding device, the playback speed thereof; an output buffer for temporarily storing a digital audio signal outputted from the playback speed change device; a read out device for reading out the digital audio signals stored in the output buffer at predetermined time intervals; a playback speed control device for controlling the playback speed change device on the basis of the number of packets stored in the jitter buffer; and decoding timing control means for controlling the timing of decoding by the decoding device on the basis of the amount of data stored in the output buffer.
    Type: Application
    Filed: September 29, 2003
    Publication date: October 14, 2004
    Inventors: Kozo Okuda, Mika Kirimoto, Hiroyuki Hirai, Hiroki Onishi
  • Publication number: 20040179676
    Abstract: A speech communication apparatus comprises voice speed conversion means for changing the time scale of a voice signal of a called party which arrives through a telephone line, and sidetone erasure means for erasing a sidetone signal.
    Type: Application
    Filed: March 29, 2004
    Publication date: September 16, 2004
    Inventors: Kozo Okuda, Mitsuo Fujimoto, Takeo Inoue, Mika Kirimoto, Naoya Iwasaki