Patents by Inventor Mikai Chen
Mikai Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11977480Abstract: A scaling factor for a data unit of a memory device is obtained. The scaling factor corresponds to a difference between a first error rate associated with a first set of memory access operations performed at the data unit and a second error rate associated with a second set of memory access operations performed at the data unit. A media management operation is scheduled on the data unit in view of the scaling factor.Type: GrantFiled: June 30, 2022Date of Patent: May 7, 2024Assignee: Micron Technology, Inc.Inventors: Mikai Chen, Zhenlei Shen, Murong Lang, Zhenming Zhou
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Patent number: 11914510Abstract: In a memory sub-system, data can be received to be stored at a 3-dimensional (3D) memory component in response to a write operation. A first location of a first layer of the 3D memory component is determined at which to store a first portion of the data, where the first layer is within a first logical unit. A second location of a second layer of the 3D memory component is determined at which to store a second portion of the data, where the second layer is within a second logical unit that is different than the first logical unit. The first portion of the data is caused to be stored in first memory cells at the first location within the first layer. The second portion of the data is caused to be stored in second memory cells at the second location within the second layer.Type: GrantFiled: May 4, 2022Date of Patent: February 27, 2024Assignee: Micron Technology, Inc.Inventors: Mikai Chen, Zhengang Chen, Charles See Yeung Kwong
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Patent number: 11776611Abstract: A processing device of a memory sub-system is configured to determine, for a memory unit of the memory device, a plurality of write disturb counts associated with the memory unit, wherein each of the plurality of write disturb (WD) count is associated with a corresponding write disturb direction; compute, for the memory unit, a weighted WD count reflecting the plurality of write disturb counts; determine whether the weighted WD count meets a criterion; and responsive to determining that the weighted WD count meets the criterion, perform a refresh operation on the memory unit.Type: GrantFiled: August 3, 2021Date of Patent: October 3, 2023Assignee: Micron Technology, Inc.Inventors: Mikai Chen, Zhenming Zhou, Murong Lang, Zhenlei Shen
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Patent number: 11756597Abstract: A system includes a memory device having memory cells and a processing device operatively coupled to the memory device. The processing device is to perform operations including: determining a length of time the memory device has been powered off; and in response to determining that the length of time satisfies a threshold value: for each of multiple groups of memory cells, asserting a corresponding flag; determining, based on the length of time, one or more adjusted demarcation voltages to be used in reading a state of the multiple groups of memory cells; and storing the one or more adjusted demarcation voltages for use in performing memory operations.Type: GrantFiled: August 3, 2021Date of Patent: September 12, 2023Assignee: Micron Technology, Inc.Inventors: Mikai Chen, Zhenlei Shen, Murong Lang, Zhenming Zhou
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Patent number: 11709602Abstract: A respective write cycle count for each of a plurality of data units of a memory device is obtained. Based on the respective write cycle count, whether a data unit of the plurality of data units satisfies a media management criterion is determined. Responsive to determining that the respective write cycle count satisfies the media management criterion, a media management operation every first constant cycle count on the data unit is performed. Responsive to determining that the respective write cycle count does not satisfy the media management criterion, a media management operation every second constant cycle count on the data unit is performed. The second constant cycle count is less than the first constant count.Type: GrantFiled: August 17, 2021Date of Patent: July 25, 2023Assignee: Micron Technology, Inc.Inventors: Mikai Chen, Murong Lang, Zhenming Zhou
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Patent number: 11635794Abstract: A method includes monitoring temperature characteristics for a plurality of memory components of a memory sub-system and determining that a temperature characteristic corresponding to at least one of the memory components has reached a threshold temperature. The method further includes determining a data reliability parameter for the at least one of the memory components that has reached the threshold temperature, determining whether the determined data reliability parameter is below a threshold data reliability parameter value for the at least one of the memory components that has reached the threshold temperature, and, based on determining that the data reliability parameter for the at least one of the memory components that has reached the threshold temperature is below the threshold data reliability parameter value, refraining from performing a thermal throttling operation.Type: GrantFiled: August 10, 2020Date of Patent: April 25, 2023Assignee: Micron Technology, Inc.Inventors: Mikai Chen, Zhenming Zhou, Zhenlei Shen, Murong Lang
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Publication number: 20230059589Abstract: A respective write cycle count for each of a plurality of data units of a memory device is obtained. Based on the respective write cycle count, whether a data unit of the plurality of data units satisfies a media management criterion is determined. Responsive to determining that the respective write cycle count satisfies the media management criterion, a media management operation every first constant cycle count on the data unit is performed. Responsive to determining that the respective write cycle count does not satisfy the media management criterion, a media management operation every second constant cycle count on the data unit is performed. The second constant cycle count is less than the first constant count.Type: ApplicationFiled: August 17, 2021Publication date: February 23, 2023Inventors: Mikai Chen, Murong Lang, Zhenming Zhou
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Publication number: 20230043238Abstract: A processing device of a memory sub-system is configured to determine, for a memory unit of the memory device, a plurality of write disturb counts associated with the memory unit, wherein each of the plurality of write disturb (WD) count is associated with a corresponding write disturb direction; compute, for the memory unit, a weighted WD count reflecting the plurality of write disturb counts; determine whether the weighted WD count meets a criterion; and responsive to determining that the weighted WD count meets the criterion, perform a refresh operation on the memory unit.Type: ApplicationFiled: August 3, 2021Publication date: February 9, 2023Inventors: Mikai Chen, Zhenming Zhou, Murong Lang, Zhenlei Shen
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Publication number: 20230043775Abstract: A system comprising includes a memory device having memory cells a processing device, operatively coupled to the memory device. The processing device is to perform operations including: determining a length of time the memory device has been powered off; and in response to determining that the length of time satisfies a threshold value: for each of multiple groups of memory cells, asserting a corresponding flag; determining, based on the length of time, one or more adjusted demarcation voltages to be used in reading a state of the multiple groups of memory cells; and storing the one or more adjusted demarcation voltages for use in performing memory operations.Type: ApplicationFiled: August 3, 2021Publication date: February 9, 2023Inventors: Mikai Chen, Zhenlei Shen, Murong Lang, Zhenming Zhou
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Publication number: 20220334961Abstract: A scaling factor for a data unit of a memory device is obtained. The scaling factor corresponds to a difference between a first error rate associated with a first set of memory access operations performed at the data unit and a second error rate associated with a second set of memory access operations performed at the data unit. A media management operation is scheduled on the data unit in view of the scaling factor.Type: ApplicationFiled: June 30, 2022Publication date: October 20, 2022Inventors: Mikai Chen, Zhenlei Shen, Murong Lang, Zhenming Zhou
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Publication number: 20220261345Abstract: In a memory sub-system, data can be received to be stored at a 3-dimensional (3D) memory component in response to a write operation. A first location of a first layer of the 3D memory component is determined at which to store a first portion of the data, where the first layer is within a first logical unit. A second location of a second layer of the 3D memory component is determined at which to store a second portion of the data, where the second layer is within a second logical unit that is different than the first logical unit. The first portion of the data is caused to be stored in first memory cells at the first location within the first layer. The second portion of the data is caused to be stored in second memory cells at the second location within the second layer.Type: ApplicationFiled: May 4, 2022Publication date: August 18, 2022Inventors: Mikai Chen, Zhengang Chen, Charles See Yeung Kwong
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Patent number: 11403216Abstract: A processing device of a memory sub-system performs an operation including obtaining, at a first time, a first scaling factor for a data unit of a set of data units of a memory device. The first scaling factor is associated with a first number of write operations performed at the data unit and a first number of read operations performed at the data unit. The processing device also performs an operation including calculating a first media management metric based on at least the first scaling factor, the first number of write operations, and the first number of read operations. In response to determining that the first media management metric satisfies a media management criterion, the processing device performs a media management operation on the data unit.Type: GrantFiled: August 27, 2020Date of Patent: August 2, 2022Assignee: Micron Technology, Inc.Inventors: Mikai Chen, Zhenlei Shen, Murong Lang, Zhenming Zhou
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Patent number: 11341046Abstract: Data can be received to be stored at a memory component. A first location of a first layer of the memory component to store a first portion of the data can be determined. A second location of a second layer of the memory component to store a second portion of the data can be determined, where the second layer is different from the first layer. The first portion of the data can be stored at the first layer of the memory component and the second portion of the data can be stored at the second layer of the memory component.Type: GrantFiled: August 5, 2019Date of Patent: May 24, 2022Assignee: Micron Technology, Inc.Inventors: Mikai Chen, Zhengang Chen, Charles See Yeung Kwong
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Publication number: 20220066924Abstract: A processing device of a memory sub-system performs an operation including obtaining, at a first time, a first scaling factor for a data unit of a set of data units of a memory device. The first scaling factor is associated with a first number of write operations performed at the data unit and a first number of read operations performed at the data unit. The processing device also performs an operation including calculating a first media management metric based on at least the first scaling factor, the first number of write operations, and the first number of read operations. In response to determining that the first media management metric satisfies a media management criterion, the processing device performs a media management operation on the data unit.Type: ApplicationFiled: August 27, 2020Publication date: March 3, 2022Inventors: Mikai Chen, Zhenlei Shen, Murong Lang, Zhenming Zhou
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Publication number: 20220050618Abstract: A method includes performing a quantity of write cycles on memory components. The method can further include monitoring codewords, and, for each of the codewords including a first error parameter value, determining a second error parameter value. The method can further include determining a probability that each of the codewords is associated with a particular one of the second error parameter values at the first error parameter value and determining a quantity of each of the codewords that are associated with each of the determined probabilities. The method can further include determining a statistical boundary of the quantity of each of the codewords and determining a correlation between the quantity of write cycles performed and the corresponding determined statistical boundary of the quantity of each of the codewords.Type: ApplicationFiled: August 11, 2020Publication date: February 17, 2022Inventors: Mikai Chen, Murong Lang, Zhenming Zhou
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Publication number: 20220043493Abstract: A method includes monitoring temperature characteristics for a plurality of memory components of a memory sub-system and determining that a temperature characteristic corresponding to at least one of the memory components has reached a threshold temperature. The method further includes determining a data reliability parameter for the at least one of the memory components that has reached the threshold temperature, determining whether the determined data reliability parameter is below a threshold data reliability parameter value for the at least one of the memory components that has reached the threshold temperature, and, based on determining that the data reliability parameter for the at least one of the memory components that has reached the threshold temperature is below the threshold data reliability parameter value, refraining from performing a thermal throttling operation.Type: ApplicationFiled: August 10, 2020Publication date: February 10, 2022Inventors: Mikai Chen, Zhenming Zhou, Zhenlei Shen, Murong Lang
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Patent number: 11231870Abstract: A method includes performing a quantity of write cycles on memory components. The method can further include monitoring codewords, and, for each of the codewords including a first error parameter value, determining a second error parameter value. The method can further include determining a probability that each of the codewords is associated with a particular one of the second error parameter values at the first error parameter value and determining a quantity of each of the codewords that are associated with each of the determined probabilities. The method can further include determining a statistical boundary of the quantity of each of the codewords and determining a correlation between the quantity of write cycles performed and the corresponding determined statistical boundary of the quantity of each of the codewords.Type: GrantFiled: August 11, 2020Date of Patent: January 25, 2022Assignee: Micron Technology, Inc.Inventors: Mikai Chen, Murong Lang, Zhenming Zhou
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Patent number: 11222710Abstract: A method includes determining, for a plurality of memory dice, a signal reliability characteristic and ranking the plurality of memory dice based, at least in part, on the determined reliability characteristics. The method can further include arranging the plurality of memory dice to form a memory device based, at least in part, on the ranking.Type: GrantFiled: August 10, 2020Date of Patent: January 11, 2022Assignee: Micron Technology, Inc.Inventors: Mikai Chen, Zhenming Zhou, Zhenlei Shen, Murong Lang
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Publication number: 20210042224Abstract: Data can be received to be stored at a memory component. A first location of a first layer of the memory component to store a first portion of the data can be determined. A second location of a second layer of the memory component to store a second portion of the data can be determined, where the second layer is different from the first layer. The first portion of the data can be stored at the first layer of the memory component and the second portion of the data can be stored at the second layer of the memory component.Type: ApplicationFiled: August 5, 2019Publication date: February 11, 2021Inventors: Mikai Chen, Zhengang Chen, Charles See Yeung Kwong
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Patent number: 9960175Abstract: A method for generating a non-volatile memory device may comprise: applying plasma for a preset time period to an exposed surface of a channel of a field effect transistor such that a plurality of charge-trapping sites are formed at the channel. The channel is comprised of a multi-layer structure of atomically thin two-dimensional sheets.Type: GrantFiled: March 6, 2015Date of Patent: May 1, 2018Assignee: The Regents of The University of MichiganInventors: Xiaogan Liang, Hongsuk Nam, Sungjin Wi, Mikai Chen