Patents by Inventor Miki Trifunovic

Miki Trifunovic has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210320323
    Abstract: A solid-state battery and a method of making the same are disclosed. The battery includes a base frame or support, first and second exterior contacts on the base frame/support, stacked solid-state battery unit cells, first and second electrical connections, and encapsulation in contact with the base frame/support and covering the solid-state battery unit cells and the electrical connections. Each stacked solid-state battery unit cell is on a metal substrate and has exposed cathode and anode current collectors. The electrical connections respectively electrically connect the exposed cathode and anode current collectors to the first and second exterior contacts. The method includes forming the stacked solid-state battery unit cells on the base frame/support, forming the exterior contacts on the base frame/support, electrically connecting the exposed cathode and anode current collectors to the respective exterior contacts, and encapsulating the solid-state battery unit cells and the electrical connections.
    Type: Application
    Filed: February 25, 2021
    Publication date: October 14, 2021
    Inventors: Aditi CHANDRA, Richard VAN DER LINDE, Paul BUTLER, Mao ITO, Jon SIMMONS, Miki TRIFUNOVIC, Alex YAN, Arvind KAMATH, Shoba RAO
  • Publication number: 20210074653
    Abstract: Embodiments of the disclosure pertain to a multi-layer barrier for a flexible substrate supporting electronic and/or microelectromechanical system (MEMS) devices. Apparatuses including a substrate, a first metal nitride layer, a first oxide layer on or over the first metal nitride layer, a second metal nitride layer and a second oxide layer on or over the first oxide layer, and a device layer on or over the first oxide layer or both the first and second oxide layers are disclosed. When the device layer is on or over the first oxide layer, the second metal nitride layer is on or over the device layer, and the second oxide layer is on or over the on or over the second metal nitride layer. When the device layer is on or over both the first and second oxide layers, the second metal nitride layer is on or over the second oxide layer. A method of making the same is also disclosed.
    Type: Application
    Filed: September 3, 2020
    Publication date: March 11, 2021
    Applicant: Thin Film Electronics ASA
    Inventors: Miki TRIFUNOVIC, Aditi CHANDRA, Robert FULLER, Raymond VASS, Patricia BECK, Mao ITO, Arvind KAMATH
  • Publication number: 20200273719
    Abstract: A method of attaching one or more active devices on one or more substrates to a metal carrier by “hot stamping” is disclosed. The method includes contacting the active device(s) on the substrate(s) with the metal carrier, and applying pressure to and heating the active device(s) on the substrate(s) and the metal carrier sufficiently to affix or attach the active device(s) on the substrate(s) to the metal carrier. The active device(s) may include an integrated circuit. The substrate(s) may include a metal substrate on the backside of the active device and a protective/carrier film on the frontside of the active device. The protective/carrier film may be or include an organic polymer. The metal carrier may be or include a metal foil. Various examples of the method further include thinning the metal substrate, dicing the active device(s) and a continuous substrate, and/or separating the active devices.
    Type: Application
    Filed: February 26, 2020
    Publication date: August 27, 2020
    Applicant: Thin Film Electronics ASA
    Inventors: Miki TRIFUNOVIC, Aditi CHANDRA, Anand DESHPANDE, Arvind KAMATH
  • Publication number: 20170316937
    Abstract: Methods for low-temperature formation of one or more thin-film semiconductor structures on a substrate that include the steps of, forming a (poly)silane layer over a substrate, transforming one or more parts of the (poly)silane layer in one or more thin-film solid-state semiconductor structures, by exposing the one or more parts with light from an
    Type: Application
    Filed: October 30, 2015
    Publication date: November 2, 2017
    Inventors: Ryoichi Ishihara, Michiel Van Der Zwan, Miki Trifunovic
  • Patent number: 9620625
    Abstract: A method for manufacturing a submicron semiconductor structure on a substrate, including: forming at least one template layer over a support substrate; forming one or more template structures, including one or more recesses and/or mesas, in the template layer, the one or more template structures including one or more edges extending into or out of the top surface of the template layer; coating at least part of the one or more template structures with a liquid semiconductor precursor; and, annealing and/or exposing the liquid semiconductor precursor coated template structures to light, wherein during the annealing and/or light exposure a part of the liquid semiconductor precursor accumulates by capillary forces against at least part of the one or more edges, the annealing and/or light exposure transforming the accumulated liquid semiconductor precursor into a submicron semiconductor structure extending along at least part of the one or more edges.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: April 11, 2017
    Assignee: TECHNISCHE UNIVERSITEIT DELFT
    Inventors: Ryoichi Ishihara, Michiel Van Der Zwan, Miki Trifunovic
  • Patent number: 9595437
    Abstract: A method for forming a silicon layer using a liquid silane compound is described. The method includes the steps of: forming a first layer on a substrate, preferably a flexible substrate, the first layer having a (poly)silane; and, irradiating with light having one or more wavelength within the range between 200 and 400 nm for transforming the polysilane in silicon, preferably amorphous silicon or polysilicon.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: March 14, 2017
    Assignee: Technische Universiteit Delft
    Inventors: Ryoichi Ishihara, Miki Trifunovic, Michiel Van Der Zwan
  • Publication number: 20160118252
    Abstract: A method for forming a silicon layer using a liquid silane compound is described. The method includes the steps of: forming a first layer on a substrate, preferably a flexible substrate, the first layer having a (poly)silane; and, irradiating with light having one or more wavelength within the range between 200 and 400 nm for transforming the polysilane in silicon, preferably amorphous silicon or polysilicon.
    Type: Application
    Filed: April 28, 2014
    Publication date: April 28, 2016
    Applicant: Technische Universiteit Delft
    Inventors: Ryoichi Ishihara, Miki Trifunovic, Michiel Van Der Zwan
  • Publication number: 20150380524
    Abstract: A method for manufacturing a submicron semiconductor structure on a substrate, including: forming at least one template layer over a support substrate; forming one or more template structures, including one or more recesses and/or mesas, in the template layer, the one or more template structures including one or more edges extending into or out of the top surface of the template layer; coating at least part of the one or more template structures with a liquid semiconductor precursor; and, annealing and/or exposing the liquid semiconductor precursor coated template structures to light, wherein during the annealing and/or light exposure a part of the liquid semiconductor precursor accumulates by capillary forces against at least part of the one or more edges, the annealing and/or light exposure transforming the accumulated liquid semiconductor precursor into a submicron semiconductor structure extending along at least part of the one or more edges.
    Type: Application
    Filed: January 28, 2014
    Publication date: December 31, 2015
    Inventors: Ryoichi Ishihara, Michiel Van Der Zwan, Miki Trifunovic