Abstract: An image converting apparatus includes a memory which can store frame information of an image to be played, and an image processing section which can read frame information from the memory and convert the frame rate to a predetermined frame rate in response to a predetermined state and in accordance with the play state.

Abstract: An image converting apparatus includes a memory which can store frame information of an image to be played, and an image processing section which can read frame information from the memory and convert the frame rate to a predetermined frame rate in response to a predetermined state and in accordance with the play state.

Abstract: A data transmission system having a clock shift compensating function is designed for a reduced circuit scale and reduced electric power consumption. A data transmission D flip-flop in a transmitter is supplied with a clock signal for transmitting data from a clock delay. A transmitter has a data reception D flip-flop, a clock supply, a divide-by-n frequency divider for frequency-dividing a clock signal, and a metastability avoider for removing a metastable state from a clock signal received via the clock delay. The transmitter also has a phase comparator for comparing output signals from the metastability avoider and a modulo-m counter, and a clock edge deleter for controlling the number of pulses or edges of the clock signal from the clock supply depending on an output signal from the phase comparator. Pulses of the clock signal from the clock edge deleter are counted by the counter and supplied to the data reception D flip-flop.