Patents by Inventor Mikiya Akagi

Mikiya Akagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Cashe memory arrangement comprising a cashe buffer in combination with a pair of cache memories
    Patent number: 4467414
    Abstract: In a cache memory arrangement used between a control processor (21) and a main memory (22) and comprising operand and instruction cache memories (31, 32), a cache buffer circuit (40) is responsive to storage requests from the central processor to individually memorize the accompanying storage data and store address data and to produce the memorized storage data and store address data as buffer output data and buffer output address data together with a buffer store request. Responsive to the buffer store request, first and second cache control circuits (36, 37) transfer for accompanying buffer output address data to the operand and the instruction cache memories, if each of the operand and the instruction cache memories is not supplied with any readout requests.
    Type: Grant
    Filed: August 19, 1981
    Date of Patent: August 21, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Mikiya Akagi, Hiroyuki Nishimura, Hideki Nishimura