Abstract: The semiconductor device according to the present invention has an n-channel output transistor wherein an input voltage is impressed on a drain, and a pulsed switching voltage that corresponds to a switching drive of the transistor is brought out from a source; a bootstrap circuit for generating a boost voltage enhanced by a predetermined electric potential above the switching voltage; an internal circuit for receiving a supply of the boost voltage to generate a switching drive signal, and supplying the signal to a gate of the output transistor; an overvoltage protection circuit for monitoring an electric potential difference between the switching voltage and the boost voltage, and generating an overvoltage detection signal; and a switching element for establishing/blocking electrical conduction between the internal circuit and the end impressed with the boost voltage, in accordance with the overvoltage detection signal.

Abstract: The semiconductor device according to the present invention has an n-channel output transistor wherein an input voltage is impressed on a drain, and a pulsed switching voltage that corresponds to a switching drive of the transistor is brought out from a source; a bootstrap circuit for generating a boost voltage enhanced by a predetermined electric potential above the switching voltage; an internal circuit for receiving a supply of the boost voltage to generate a switching drive signal, and supplying the signal to a gate of the output transistor; an overvoltage protection circuit for monitoring an electric potential difference between the switching voltage and the boost voltage, and generating an overvoltage detection signal; and a switching element for establishing/blocking electrical conduction between the internal circuit and the end impressed with the boost voltage, in accordance with the overvoltage detection signal.

Abstract: The semiconductor device according to the present invention has an n-channel output transistor wherein an input voltage is impressed on a drain, and a pulsed switching voltage that corresponds to a switching drive of the transistor is brought out from a source; a bootstrap circuit for generating a boost voltage enhanced by a predetermined electric potential above the switching voltage; an internal circuit for receiving a supply of the boost voltage to generate a switching drive signal, and supplying the signal to a gate of the output transistor; an overvoltage protection circuit for monitoring an electric potential difference between the switching voltage and the boost voltage, and generating an overvoltage detection signal; and a switching element for establishing/blocking electrical conduction between the internal circuit and the end impressed with the boost voltage, in accordance with the overvoltage detection signal.

Abstract: The semiconductor device according to the present invention has an n-channel output transistor wherein an input voltage is impressed on a drain, and a pulsed switching voltage that corresponds to a switching drive of the transistor is brought out from a source; a bootstrap circuit for generating a boost voltage enhanced by a predetermined electric potential above the switching voltage; an internal circuit for receiving a supply of the boost voltage to generate a switching drive signal, and supplying the signal to a gate of the output transistor; an overvoltage protection circuit for monitoring an electric potential difference between the switching voltage and the boost voltage, and generating an overvoltage detection signal; and a switching element for establishing/blocking electrical conduction between the internal circuit and the end impressed with the boost voltage, in accordance with the overvoltage detection signal.

Abstract: An overheat protection circuit 1 of a semiconductor integrated circuit device of the invention has filter means for removing a high frequency component from a power supply voltage Vcc. Specifically, the overheat protection circuit 1 has: a band gap power supply portion BG and resistors R1 and R2 that produce a reference voltage Vref; a transistor N1 for temperature detection; resistors R3 and R4 that generate, from the power supply voltage Vcc, a control signal Sctrl according to the on/off state of the transistor N1; a transistor P1 that is turned on/off according to the control signal Sctrl; and a transistor N2 and resistors R5 and R6 that generate an overheat protection signal Stsd according to the on/off state of the transistor P1. In addition, the overheat protection circuit 1 has, as the filter means, a resistor R7 and a capacitor C1 that are respectively connected to the emitter and the collector of the transistor P1.

Abstract: A step-up/step-down regulator circuit wherein a switch has a terminal connected to an end of an inductor, another terminal grounded, and a control terminal connected to an end of a switch. In this way, performing an open/close control of the switch can indirectly perform an open/close control of the switch, thereby solving the problem that the structure and operation of a switch control circuit will be complicated when the switching between step-up and step-down operation is realized.

Abstract: An overheat protection circuit 1 of a semiconductor integrated circuit device of the invention has filter means for removing a high frequency component from a power supply voltage Vcc. Specifically, the overheat protection circuit 1 has: a band gap power supply portion BG and resistors R1 and R2 that produce a reference voltage Vref; a transistor N1 for temperature detection; resistors R3 and R4 that generate, from the power supply voltage Vcc, a control signal Sctrl according to the on/off state of the transistor N1; a transistor P1 that is turned on/off according to the control signal Sctrl; and a transistor N2 and resistors R5 and R6 that generate an overheat protection signal Stsd according to the on/off state of the transistor P1. In addition, the overheat protection circuit 1 has, as the filter means, a resistor R7 and a capacitor C1 that are respectively connected to the emitter and the collector of the transistor P1.

Abstract: A step-up/step-down regulator circuit wherein a switch (N2) has a terminal connected to an end of an inductor (L1), another terminal grounded, and a control terminal connected to an end of a switch (N1). In this way, performing an open/close control of the switch (N1) can indirectly perform an open/close control of the switch (N2), thereby solving the problem that the structure and operation of a switch control circuit will be complicated when the switching between step-up and step-down operation is realized.

Abstract: A DC/DC converter is supplied such that the desired output setting voltage can be obtained as the load-side output, even when the difference between the power supply voltage and the output setting voltage of the load-side output is large. This DC/DC converter comprises a switching device, a voltage divider, an error amplifier, an oscillator which outputs a oscillation clock, a slope circuit which receives the oscillation clock and outputs a sawtooth waveform voltage having a slope which begins at the leading edge of the oscillation clock, a comparator which compares the sawtooth waveform voltage and the output voltage of the error amplifier, and a logic circuit which is set by the trailing edge of the oscillation clock, and is reset by the output of the comparator.

Abstract: A DC/DC converter is supplied such that the desired output setting voltage can be obtained as the load-side output, even when the difference between the power supply voltage and the output setting voltage of the load-side output is large. This DC/DC converter comprises a switching device, a voltage divider, an error amplifier, an oscillator which outputs a oscillation clock, a slope circuit which receives the oscillation clock and outputs a sawtooth waveform voltage having a slope which begins at the leading edge of the oscillation clock, a comparator which compares the sawtooth waveform voltage and the output voltage of the error amplifier, and a logic circuit which is set by the trailing edge of the oscillation clock, and is reset by the output of the comparator.

Abstract: A DC/DC converter is supplied such that the desired output setting voltage can be obtained as the load-side output, even when the difference between the power supply voltage and the output setting voltage of the load-side output is large. This DC/DC converter comprises a switching device, a voltage divider, an error amplifier, an oscillator which outputs a oscillation clock, a slope circuit which receives the oscillation clock and outputs a sawtooth waveform voltage having a slope which begins at the leading edge of the oscillation clock, a comparator which compares the sawtooth waveform voltage and the output voltage of the error amplifier, and a logic circuit which is set by the trailing edge of the oscillation clock, and is reset by the output of the comparator.

Abstract: A DC/DC converter is supplied such that the desired output setting voltage can be obtained as the load-side output, even when the difference between the power supply voltage and the output setting voltage of the load-side output is large. This DC/DC converter comprises a switching device, a voltage divider, an error amplifier, an oscillator which outputs a oscillation clock, a slope circuit which receives the oscillation clock and outputs a sawtooth waveform voltage having a slope which begins at the leading edge of the oscillation clock, a comparator which compares the sawtooth waveform voltage and the output voltage of the error amplifier, and a logic circuit which is set by the trailing edge of the oscillation clock, and is reset by the output of the comparator.

Abstract: When an output voltage output from a buffer approaches a ground voltage, a MOS transistor turns off, so that clamp for a gate of the MOS transistor is released.

Abstract: A power supply circuit comprising a charge pump circuit supplies a supply voltage to a gate driver. A timing controller supplies a predetermined timing signal to a NAND circuit, a shutdown terminal of the charge pump circuit, and a gate shading circuit including a capacitor, a resistor, a NOT circuit, and a transistor. When this timing signal is high, the charge pump circuit makes a normal operation and the gate shading circuit is deactivated. When this timing signal is low, the charge pump circuit stops operating and the gate shading circuit is activated to drain an electric charge from the output of the charge pump circuit.

Abstract: When an output voltage output from a buffer approaches a ground voltage, a MOS transistor turns off, so that clamp for a gate of the MOS transistor is released.

Abstract: A DC/DC converter is supplied such that the desired output setting voltage can be obtained as the load-side output, even when the difference between the power supply voltage and the output setting voltage of the load-side output is large. This DC/DC converter comprises a switching device, a voltage divider, an error amplifier, an oscillator which outputs a oscillation clock, a slope circuit which receives the oscillation clock and outputs a sawtooth waveform voltage having a slope which begins at the leading edge of the oscillation clock, a comparator which compares the sawtooth waveform voltage and the output voltage of the error amplifier, and a logic circuit which is set by the trailing edge of the oscillation clock, and is reset by the output of the comparator.

Abstract: A gamma correction voltage generation device relating to the invention has a plurality of sets, each comprising a data holding section for holding digital data inputted thereto, a digital-to-analog converter for converting the digital data held in the data holding section to an analog voltage, and a buffer for amplifying a capacity of current of the analog voltage and outputting the analog voltage, wherein the analog voltages are outputted from the buffers as gamma correction voltages. By this configuration, it becomes possible to perform a process of adjustments on the gamma correction voltages easily and efficiently.