Abstract: A loss of optical input detector is disclosed disposed to receive a signal voltage from a fiber-optic receiver indicating that the optical input has dropped below a preset threshold. The detector includes a voltage follower connected to the fiber-optic receiver which passes to the detector circuit the signal voltage. A comparator circuit receives the signal voltage and compares it to a reference voltage. When the signal voltage is greater than the reference voltage the comparator produces and applies to an alarm circuit a positive voltage signal. This positive voltage signal turns on the alarm circuit. The alarm circuit provides a visual alarm indication and a logic signal to a controller interface indicating a loss of the optical input signal.

Abstract: A laser driver circuit is disclosed for operating an electrical current driven light emitting device or laser. The laser driver circuit is driven from external equipment by a modulated electrical signal and includes a laser biasing network arranged to provide a threshold current to the laser. The current is sufficient to bias the laser to an operating point just below the laser's turn on threshold. First and second transistors connected to the laser form a differential switching amplifier. The differential switching amplifier is disposed to switch drive current provided by a constant current source to the laser. The drive current is sufficient to drive the laser over the threshold set by the laser biasing network. On the application of the modulated electrical signal to the first transistor of the differential switching amplifier the drive current is switched from one side of the differential switching amplifier to the other effectively turning the laser on and off.

Abstract: A laser temperature controller is disclosed for controlling the temperature of a laser device. The controller includes a bridge circuit connected to a thermistor device which is mounted on the laser package. The bridge circuit generates error signals representing a need for cooling or heating as the operating temperature of the laser rises or falls about a set threshold. A voltage conversion circuit converts the error signals to a positive or negative polarity voltage. The output of the voltage conversion circuit is applied to a pair of operational amplifiers which input the voltage and compare it to a set reference voltage. When cooling is required a first amplifier provides a biasing voltage to a transistor when a set threshold is exceeded. The associated transistor switches drive current to a thermoelectric device mounted on the laser package thereby, cooling the laser.

Abstract: A laser DC bias controller is disclosed for controlling and monitoring the laser of a fiber-optic transmitter. The arrangement comprises an optical power monitor including a light detector for converting the light output by the laser into photo current. The photo current is converted by the optical power monitor into a voltage representation of the magnitude of the light output by the laser. The voltage representation is output to a DC constant current source which uses the voltage to provide operating current to the laser of sufficient magnitude to keep the laser operating at a set output level. A transmit data detector monitors the incoming data signals to the fiber optic transmitter and outputs to the optical power monitor a current signal which indicates a failure of the data signal. The optical power monitor converts the current signal to a voltage representation which is output to the DC constant current source.

Abstract: Surge-current that occurs when the pair of input lines of a power supply are energized is limited by connecting the source-to-drain path of an insulated gate FET in series in one input line and connecting its gate to an intermediate node of a voltage divider that is connected across the input lines, with an integrating capacitor connected between the node and one input line for reducing the rate of conduction of the FET. Overvoltage protection is provided by electrically connecting a latch circuit between the node and the one input line, with the FET's gate being electrically connected to the collector of a latch transistor that has its base driven by an overvoltage indication. The series combination of a timing resistor and timing capacitor is connected across the primary conduction path of the FET and the base of a unijunction transistor that has its emitter directly connected to the junction of the resistor and capacitor and AC coupled to the base of the latch transistor.