Abstract: A storage pixel sensor disposed on a semiconductor substrate comprises a photodiode having a first terminal coupled to a first potential and a second terminal. A barrier transistor has a first terminal coupled to the second terminal of the photodiode, a second terminal and a control gate coupled to a barrier set voltage. A reset transistor has a first terminal coupled to the second terminal of the barrier transistor, a second terminal coupled to a reset reference potential that reverse biases the photodiode, and a control gate coupled to a source of a RESET signal. A photocharge integration node is coupled to said second terminal of said barrier transistor. The photocharge integration node comprises the control gate of a first source-follower transistor. The first source-follower transistor is coupled to a source of bias current and has an output.

Abstract: An integrated active pixel sensor array arranged in a plurality of rows and columns comprises a saturation level line coupled to a source of saturation level control voltage, a global current-summing node.

Abstract: A digital pixel sensor is formed on a semiconductor substrate and comprises a phototransducer responsive to light for providing an analog output signal that is a function of an incident amount of light. A comparator is configured to compare the analog output signal and a ramp reference signal. A plurality of n DRAM cells are configured to store an at least n-bit digital signal in response to the output of the comparator. An array of digital pixel sensors is also disclosed.

Abstract: An integrated active pixel sensor array comprises a plurality of row select lines, each of said row select lines coupled to a source of a row-select signal; a plurality of source-follower drain row lines, each of said source-follower drain row lines coupled to a source of a source-follower drain row signal; a plurality of column output lines; a reset line coupled to a source of a reset signal; a source of reset potential; and a plurality of active pixel sensors, each pixel sensor associated with one row and one column of the array and including a photodiode having a first terminal coupled to a first reference potential and a second terminal, a Reset transistor having a gate coupled to the reset line, a drain coupled to the reset potential to reverse bias the photodiode, and a source coupled to the second terminal of the photodiode, a Source-Follower transistor having a gate coupled to the second terminal of the photodiode, a drain connected to the one of the plurality of source-follower drain row lines with w