Abstract: A high voltage radiation hardened power integrated circuit (PIC) with resistance to TID and SEE radiation effects for application in high radiation environments, such as outer space. TID hardness modification include forming gate oxide layers after high temperature junction processes, adding implant layers to raise the parasitic MOSFET thresholds with respect to native thresholds, and suppressing CMOS drain-to-source and intrawell transistor-to-transistor leakage. In addition, radhard field oxide is utilized. SEE ruggedness is improved by reducing the epi thickness over that of non-radhard devices, and increasing the epi concentration near the substrate junction. A radhard PIC rated to 400 V and capable of operating at 600 V or more is provided. The inventive PIC can withstand 100 krads of TID and a heavy ion Linear Energy Transfer of 37 MeV/(mg/cm2) at full rated voltage.