Patents by Inventor Min Jiao
Min Jiao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230395436Abstract: Semiconductor devices and methods are provided. In an embodiment, a method includes providing a workpiece including a first hard mask layer on a top surface of a substrate, performing an ion implantation process to form a doped region in the substrate, after the performing of the ion implantation process, annealing the workpiece at temperature T1. The method also includes selectively removing the first hard mask layer, after the selectively removing of the first hard mask layer, performing a pre-bake process at temperature T2, and, after the performing of the pre-bake process, epitaxially growing a vertical stack of alternating channel layers and sacrificial layers on the substrate, where the temperature T2 is lower than the temperature T1.Type: ApplicationFiled: June 7, 2022Publication date: December 7, 2023Inventors: Ming-Yuan Wu, Ka-Hing Fung, Min Jiao, Da-Wen Lin, Wei-Yuan Jheng
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Publication number: 20230197820Abstract: The present disclosure provide a method that includes receiving a substrate having a semiconductor surface of a first semiconductor material; forming an APT feature in the substrate; performing a prebaking process to the substrate with a first temperature T1; epitaxially growing an undoped semiconductor layer of the first semiconductor layer and a first thickness t1 on the substrate at a second temperature T2; epitaxially growing a semiconductor layer stack over the undoped semiconductor layer at a third temperature T3 less than T2, wherein the semiconductor layer stack includes first semiconductor layers and second semiconductor layers stacked vertically in an alternating configuration; patterning the semiconductor substrate, and the semiconductor layer stack to form a trench, thereby defining an active region being adjacent the trench; forming an isolation feature in the trench; selectively removing the second semiconductor layers; and forming a gate structure wrapping around each of the first semiconductorType: ApplicationFiled: June 7, 2022Publication date: June 22, 2023Inventors: Min Jiao, Ji-Yin Tsai, Da-Wen Lin, Hung-Ju Chou
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Publication number: 20230137528Abstract: The present disclosure provides a method that includes providing a substrate including a first circuit region and a second circuit region; forming a semiconductor stack on the substrate, wherein the semiconductor stack includes first semiconductor layers of a first composition and second semiconductor layers of a second composition alternatively stacked on the substrate; performing a first patterning process to the semiconductor stack and the substrate to form first trenches having a first depth; and performing a second patterning process to the semiconductor stack and the substrate, thereby forming second trenches of a second depth in the first circuit region and third trenches of a third depth in the second circuit region, the third depth being less than the second depth.Type: ApplicationFiled: June 4, 2022Publication date: May 4, 2023Inventors: Ming-Yuan Wu, Min Jiao, Da-Wen Lin
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Publication number: 20230015372Abstract: A method includes forming a fin protruding from a substrate, forming a first dielectric feature adjacent to the fin over the substrate, forming a cladding layer over the fin and the first dielectric feature, and removing a portion of the cladding layer to form an opening. The opening exposes the first dielectric feature. The method further includes forming a second dielectric feature adjacent to the cladding layer, the second dielectric feature filling the opening, forming a dummy gate stack over the fin and the second dielectric feature, forming source/drain (S/D) features in the fin adjacent to the dummy gate stack, and replacing the dummy gate stack and the cladding layer with a metal gate stack. The second dielectric feature divides the metal gate stack.Type: ApplicationFiled: May 4, 2022Publication date: January 19, 2023Inventors: Ming-Yuan Wu, Da-Wen Lin, Yi-Ting Fu, Hsu-Chieh Cheng, Min Jiao
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Patent number: 10483496Abstract: An electroluminescent (EL) device is disclosed. An optically reflective concave structure includes a first surface and a second surface that lies at an angle relative to the first surface, wherein at least the first and second surfaces are optically reflective. One or more functional layers include a light emitting layer, disposed over the surfaces of the optically reflective concave structure, wherein at least one electroluminescent area of the light emitting layer is defined on the first surface. Especially, the ratio between the diameter of the first surface and the thickness of the one or more functional layers in the optically reflective concave structure is smaller than a constant value.Type: GrantFiled: August 4, 2017Date of Patent: November 19, 2019Assignee: NATIONAL TAIWAN UNIVERSITYInventors: Chung-Chih Wu, Chun-Yu Lin, Wei-Kai Lee, Min Jiao, Hoang Yan Lin, Guo-Dong Su
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Patent number: 10276821Abstract: An electroluminescent (EL) device is disclosed, comprising a high-index layer, having a first refractive index more than 1.8; a first electrode, which is transparent and disposed adjacent to the high-index layer; one or more functional layers, disposed adjacent to the first electrode and opposite to the high-index layer, including a light emitting layer; and, a second electrode, disposed adjacent to the one or more functional layers and opposite to the first electrode; wherein the first electrode has a second refractive index less than 1.7.Type: GrantFiled: October 24, 2016Date of Patent: April 30, 2019Assignee: NATIONAL TAIWAN UNIVERSITYInventors: Chung-Chih Wu, Min Jiao, Chun-Yang Lu, Wei-Kai Lee
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Publication number: 20170358779Abstract: An electroluminescent (EL) device is disclosed. An optically reflective concave structure includes a first surface and a second surface that lies at an angle relative to the first surface, wherein at least the first and second surfaces are optically reflective. One or more functional layers include a light emitting layer, disposed over the surfaces of the optically reflective concave structure, wherein at least one electroluminescent area of the light emitting layer is defined on the first surface. Especially, the ratio between the diameter of the first surface and the thickness of the one or more functional layers in the optically reflective concave structure is smaller than a constant value.Type: ApplicationFiled: August 4, 2017Publication date: December 14, 2017Inventors: Chung-Chih Wu, Chun-Yu Lin, Wei-Kai Lee, Min Jiao, Hoang Yan Lin, Guo-Dong Su
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Patent number: 9837637Abstract: An electroluminescent (EL) device is disclosed, comprising a first electrode, a second electrode, one or more functional layers, and a conducting layer. The first electrode is transparent and with a high refractive index nH more than 1.75. The one or more functional layers include a light emitting layer. The conducting layer has a low refractive index nL less than 1.65, being disposed between the first electrode and the one or more functional layers. By judicious combination of the first electrode and conducting layer to induce appropriate microcavity effects, increased coupling efficiencies of EL device could be then obtained.Type: GrantFiled: October 15, 2015Date of Patent: December 5, 2017Assignee: NATIONAL TAIWAN UNIVERSITYInventors: Chung-Chih Wu, Yi-Hsiang Huang, Wei-Lung Tsai, Min Jiao, Wei-Kai Lee
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Publication number: 20170125735Abstract: An electroluminescent device is provided. The electroluminescent device includes a substrate or superstrate, an optical out-coupling structure, a first electrode, a functional stack, and a second electrode. The substrate has an outer surface and an opposite inner surface. The optical out-coupling structure situates on the outer surface. The first electrode is disposed on the inner surface. The first electrode is transparent and has a refractive index equal to or less than 1.7. The functional stack is disposed on the first electrode and includes a light emitting layer. The light emitting layer contains an emitting material having preferential horizontal emitting dipoles with a horizontal dipole ratio being equal to or larger than 70%. The second electrode is disposed on the functional stack.Type: ApplicationFiled: October 24, 2016Publication date: May 4, 2017Inventors: Chung-Chih Wu, Chun-Yang Lu, Wei-Kai Lee, Min Jiao
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Publication number: 20170125721Abstract: An electroluminescent (EL) device is disclosed, comprising a high-index layer, having a first refractive index more than 1.8; a first electrode, which is transparent and disposed adjacent to the high-index layer; one or more functional layers, disposed adjacent to the first electrode and opposite to the high-index layer, including a light emitting layer; and, a second electrode, disposed adjacent to the one or more functional layers and opposite to the first electrode; wherein the first electrode has a second refractive index less than 1.7.Type: ApplicationFiled: October 24, 2016Publication date: May 4, 2017Inventors: Chung-Chih Wu, Min Jiao, Chun-Yang Lu, Wei-Kai Lee
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Publication number: 20160268554Abstract: An electroluminescent (EL) device is disclosed. An optically reflective concave structure includes a first surface and a second surface that lies at an angle relative to the first surface, wherein at least the first and second surfaces are optically reflective. One or more functional layers include a light emitting layer, disposed over the surfaces of the optically reflective concave structure, wherein at least one electroluminescent area of the light emitting layer is defined on the first surface. Especially, the ratio between the width of the first surface and the thickness of the one or more functional layers in the optically reflective concave structure is smaller than a constant value.Type: ApplicationFiled: March 10, 2016Publication date: September 15, 2016Inventors: Chung-Chih Wu, Chun-Yu Lin, Wei-Kai Lee, Min Jiao, Hoang Yan Lin, Guo-Dong Su
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Publication number: 20160111673Abstract: An electroluminescent (EL) device is disclosed, comprising a first electrode, a second electrode, one or more functional layers, and a conducting layer. The first electrode is transparent and with a high refractive index nH more than 1.75. The one or more functional layers include a light emitting layer. The conducting layer has a low refractive index nL less than 1.65, being disposed between the first electrode and the one or more functional layers. By judicious combination of the first electrode and conducting layer to induce appropriate microcavity effects, increased coupling efficiencies of EL device could be then obtained.Type: ApplicationFiled: October 15, 2015Publication date: April 21, 2016Inventors: CHUNG-CHIH WU, YI-HSIANG HUANG, WEI-LUNG TSAI, MIN JIAO, WEI-KAI LEE
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Patent number: 8966171Abstract: An access optimization method for a main memory database based on page-coloring is described. An access sequence of all data pages of a weak locality dataset is ordered by page-color, and all the data pages are grouped by page-color, and then all the data pages of the weak locality dataset are scanned in a sequence of page-color grouping. Further, a number of memory pages having the same page-color are preset as a page-color queue, in which the page-color queue serves as a memory cache before a memory page is loaded into a CPU cache; the data page of the weak locality dataset first enters the page-color queue in an asynchronous mode, and is then loaded into the CPU cache to complete data processing. Accordingly, cache conflicts between datasets with different data locality strengths can be effectively reduced.Type: GrantFiled: May 16, 2012Date of Patent: February 24, 2015Assignee: Renmin University of ChinaInventors: Yan-Song Zhang, Shan Wang, Xuan Zhou, Min Jiao, Zhan-Wei Wang
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Publication number: 20130275649Abstract: An access optimization method for a main memory database based on page-coloring is described. An access sequence of all data pages of a weak locality dataset is ordered by page-color, and all the data pages are grouped by page-color, and then all the data pages of the weak locality dataset are scanned in a sequence of page-color grouping. Further, a number of memory pages having the same page-color are preset as a page-color queue, in which the page-color queue serves as a memory cache before a memory page is loaded into a CPU cache; the data page of the weak locality dataset first enters the page-color queue in an asynchronous mode, and is then loaded into the CPU cache to complete data processing. Accordingly, cache conflicts between datasets with different data locality strengths can be effectively reduced.Type: ApplicationFiled: May 16, 2012Publication date: October 17, 2013Applicant: RENMIN UNIVERSITY OF CHINAInventors: Yan-Song Zhang, Shan Wang, Xuan Zhou, Min Jiao, Zhan-Wei Wang