Abstract: A square cell comprises first and second bipolar transistors each having an emitter, collector and base, the bases of the transistors being connected for receiving an input voltage, and first and second resistors in series with the first and second bipolar transistors respectively and with a source of reference voltage. The collectors are commonly connected to an output node to supply an output current having a component proportional to the square of the input voltage. Enhanced square law conformance may be produced by adding further pairs of bipolar transistors to the cell, with offset voltage elements coupled between bases of successive transistors on each side of the cell.

Abstract: A square cell comprises first and second bipolar transistors each having an emitter, collector and base, the bases of the transistors being connected for receiving an input voltage, and first and second resistors in series with the first and second bipolar transistors respectively and with a source of reference voltage. The collectors are commonly connected to an output node to supply an output current having a component proportional to the square of the input voltage. Enhanced square law conformance may be produced by adding further pairs of bipolar transistors to the cell, with offset voltage elements coupled between bases of successive transistors on each side of the cell.

Abstract: An RMS to DC converter squares an a-c input signal to obtain a squared direct current voltage signal. The squared direct current voltage signal is applied to successive stages, each stage amplifying its received signal and detecting the amplified level of the signal within a confined range. The detected levels detected in the successive stages are added to produce an output d-c signal that is variable in linear proportion to logarithmic change in RMS voltage of the input signal. The voltage level of the squared direct current voltage signal can be clamped to a predetermined maximum voltage. To expand the range of detection, the squared direct current voltage signal is attenuated prior to detection in one or more of the stages.

Abstract: An RMS to DC converter squares an a-c input signal to obtain a squared direct current voltage signal. The squared direct current voltage signal is applied to successive stages, each stage amplifying its received signal and detecting the amplified level of the signal within a confined range. The detected levels detected in the successive stages are added to produce an output d-c signal that is variable in linear proportion to logarithmic change in RMS voltage of the input signal. The voltage level of the squared direct current voltage signal can be clamped to a predetermined maximum voltage. To expand the range of detection, the squared direct current voltage signal is attenuated prior to detection in one or more of the stages.

Abstract: A variable gain amplifier comprises a plurality of serially connected transistor cells, in which each of the transistor cells has a plurality of connecting terminals. The first terminals of the transistor cells are serially coupled together to receive a first input voltage. The second terminals of the transistor cells are serially connected via a first set of resistors between adjacent cells and coupled to a first gain control. Each of the second terminals is AC or virtual grounded. The third terminals of the transistor cells are coupled together to supply a positive current output. The fourth terminals of the transistor cells are coupled together to supply a negative current output.

Abstract: A variable gain amplifier comprises a plurality of serially connected transistor cells, in which each of the transistor cells has a plurality of connecting terminals. The first terminals of the transistor cells are serially coupled together to receive a first input voltage. The second terminals of the transistor cells are serially connected via a first set of resistors between adjacent cells and coupled to a first gain control. Each of the second terminals is AC or virtual grounded. The third terminals of the transistor cells are coupled together to supply a positive current output. The fourth terminals of the transistor cells are coupled together to supply a negative current output.

Abstract: A current squaring cell is provided for producing an output current that correlates to the square of an input signal current. The current squaring cell comprises a first circuit portion, which receives a first tail current that is positively proportional to the input signal current, and a second circuit portion, which connects to the first circuit portion and receives a second tail current that is negatively proportional to the input signal current.

Abstract: A squaring cell comprises a first circuit responsive to an input voltage to produce a corresponding current, and a second circuit, preferably in the form of an absolute modulator circuit, responsive to the current produced by the first circuit and to the input voltage to produce an output current that corresponds to the square of the input voltage. In one embodiment, the first circuit comprises an absolute value voltage-to-current converter; in another, the first circuit comprises a linear voltage-to-current converter. Techniques to improve accurate square law performance of the cell, independent of temperature, and of broad input voltage range and frequency, are presented.

Abstract: A variable gain amplifier contains a plurality of differential transistor pairs. A temperature dependent current is generated in the current path of each differential transistor pair. A generated gain control current is converted to a temperature dependent gain control current and applied in circuit with control inputs of the transistors of the paired differential transistors. The temperature dependent gain control current is obtained from a gain control current corresponding to a desired gain which is then multiplying the control current by the temperature dependent current. The temperature dependent gain control current is modified to compensate for gain non-linearity by introducing an offset as a function of the gain control current.

Abstract: A plurality of variable gain amplifier stages are coupled by an attenuation circuit that receives a voltage input to be amplified. A control circuit activates each of the variable gain amplifier stages in a seamless manner in accordance with a control signal applied to a voltage control node, while maintaining no more than one of the stages active at any time. Fractions of the reference signal voltage level are set to define boundaries between control voltage level ranges of the amplifier stages. A unique control voltage level range is thus established for each amplifier stage. A control voltage hysteresis range can be provided to avoid oscillations between stages at the transition voltages.

Abstract: Power measuring receiver (PMR) methods and apparatus for measuring power of signals are provided in which a high frequency measuring circuit (HFMC), a conversion measuring circuit (CMC), and an intermediate frequency measuring circuit (IFMC) work in conjunction with each other to measure a wide power range of signals. The HFMC may measure relatively high power signals at high frequency. The CMC may convert the high frequency signal into an intermediate frequency signal so that both the CMC and the IFMC can accurately measure low power signals. The CMC may also set the minimum noise bandwidth associated with gain stages in the IFMC. The intermediate frequency may provide the IFMC with the ability to perform low power measurements at a reduced DC power consumption.

Abstract: Power measuring receiver (PMR) methods and apparatus for measuring power of signals are provided in which a high frequency measuring circuit (HFMC), a conversion measuring circuit (CMC), and an intermediate frequency measuring circuit (IFMC) work in conjunction with each other to measure a wide power range of signals. The HFMC may measure relatively high power signals at high frequency. The CMC may convert the high frequency signal into an intermediate frequency signal so that both the CMC and the IFMC can accurately measure low power signals. The CMC may also set the minimum noise bandwidth associated with gain stages in the IFMC. The intermediate frequency may provide the IFMC with the ability to perform low power measurements at a reduced DC power consumption.

Abstract: Power measuring receiver (PMR) methods and apparatus for measuring power of signals are provided in which a high frequency measuring circuit (HFMC), a conversion measuring circuit (CMC), and an intermediate frequency measuring circuit (IFMC) work in conjunction with each other to measure a wide power range of signals. The HFMC may measure relatively high power signals at high frequency. The CMC may convert the high frequency signal into an intermediate frequency signal so that both the CMC and the IFMC can accurately measure low power signals. The CMC may also set the minimum noise bandwidth associated with gain stages in the IFMC. The intermediate frequency may provide the IFMC with the ability to perform low power measurements at a reduced DC power consumption.

Abstract: Power measuring receiver (PMR) methods and apparatus for measuring power of signals are provided in which a high frequency measuring circuit (HFMC), a conversion measuring circuit (CMC), and an intermediate frequency measuring circuit (IFMC) work in conjunction with each other to measure a wide power range of signals. The HFMC may measure relatively high power signals at high frequency. The CMC may convert the high frequency signal into an intermediate frequency signal so that both the CMC and the IFMC can accurately measure low power signals. The CMC may also set the minimum noise bandwidth associated with gain stages in the IFMC. The intermediate frequency may provide the IFMC with the ability to perform low power measurements at a reduced DC power consumption.

Abstract: A low voltage, current-folded signal modulator that reduces distortion in the output signal is provided. The signal modulator has a differential amplifier that receives a first input signal and converts it to a current, a current amplifier that has a low impedance input and provides an amplified current signal, and a differential pair circuit that receives a second input signal and modulates the amplified current signal by the second signal.