Abstract: Semiconductor devices and methods of manufacture are discussed. In an embodiment, a method of manufacturing a semiconductor device includes: forming first nanostructures from a first material over a substrate; forming second nanostructures from a second material different from the first material over the substrate, wherein the first nanostructures and the second nanostructures alternate vertically above the substrate; removing the first nanostructures; after the removing the first nanostructures forming an interposer in between the second nanostructures; after the forming the interposer forming a first source/drain region over the substrate and in direct physical contact with the second nanostructures; and removing the interposer exposing surfaces of each of the second nanostructures.

Abstract: A micro puree machine has a mixing shaft attachable to a blade that is subject to both linear and rotational movement. A drive motor is contained within a lower portion of the machine housing and operatively couples to a first gear that engages a second gear on the mixing shaft for rotation of the mixing blade. A position motor within the upper housing operates to move the mixing blade linearly to engage the ingredients in the bowl. During both axial and rotational movement of the mixing shaft, the drive motor and the position motor remain stationary within their respective positions in the housing.

Abstract: A smoke detector with an anti-insect function includes a substrate, an optical detection module, a top cover, a base and a perforated plate. The substrate has a ring shape region surrounding a central detection region, and a first block structure of the central detection region is protruded from the substrate and higher than an upper surface of the ring shape region. The optical detection module is disposed inside the central detection region. The top cover has a lateral wall. The base is disposed on the substrate and connected to the top cover to cover the optical detection module. The base has a second block structure partly overlapped with the lateral wall to form a guiding channel. The perforated plate is disposed between the lateral wall and the second block structure to prevent an insect from moving into the top cover through the guiding channel.

Abstract: There is provided a smoke detector including a substrate, a light source and a light sensor. The light source and the light sensor are arranged adjacently on the substrate. The substrate is arranged with an asymmetric structure to cause an illumination region of the light source to deviate toward the light sensor thereby increasing a ratio of light intensity reflected by smoke with respect to reference light intensity.

Abstract: A method and a system for wireless positioning are provided. Multiple received signal strengths corresponding to multiple wireless access points are measured by a user device. The received signal strengths include multiple first received signal strengths. A reference positioning position is obtained according to positioning reference information provided by the user device. A first positioning position based on the first received signal strengths is obtained. The reference positioning position is compared with the first positioning position. In response to the distance between the reference positioning position and the first positioning position being greater than a tolerance value, at least one of the first received signal strengths is excluded from the multiple received signal strengths, so as to obtain multiple filtered received signal strengths. A user position of the user device is obtained according to the filtered received signal strengths.

Abstract: A computing system performs artificial-intelligence (AI) super-resolution (SR). The computing system includes multiple processors, which further includes a graphics processing unit (GPU) and an AI processing unit (APU). The computing system also includes a memory to store AI models. When detecting an indication that the loading of the GPU exceeds a threshold, the processors reduce the resolution of a video output from the GPU in response to the indication. One of the AI models is selected based on graphics scenes in the video and the respective power consumption estimates of the AI models. The processors then perform AI SR operations on the video using the selected AI model to restore the resolution of the video for display.

Abstract: A manufacturing method of a display device includes forming light emitting components on a first substrate, the light emitting components include a first side and a second side, and the second side is away from the first substrate; forming a circuit layer on the first substrate and on the second side of the light emitting components; forming a first protective layer on the circuit layer and forming an insulating layer on the first protective layer; removing the first substrate after forming a second substrate on the insulating layer; forming a black matrix layer on the first side of the light emitting components, and the black matrix layer includes openings; forming light conversion layers in the openings of the black matrix layer; forming a second protective layer on the black matrix layer and the light conversion layers; and forming a third substrate on the second protective layer.

Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material and a passivation layer is disposed on the second semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material. A silicide is arranged within the passivation layer and along tops of the first doped region and the second doped region.

Abstract: Exemplary methods, apparatuses, and systems including memory self-recovery management to correct failures due to soft-error rate events. The self-recovery manager detects a failure of a memory device. The self-recovery manager retrieves a set of register values from the memory device. The self-recovery manager stores the set of register values from the memory device. The self-recovery manager issues a reset command to the memory device, the reset command including generating a re-initialized set of register values. The self-recovery manager compares the set of register values with the re-initialized set of register values. The self-recovery manager triggering a self-recovery attempt using the comparison of the set of register values with the re-initialized set of register values.

Abstract: A semiconductor device includes a first transistor and a protection structure. The first transistor includes a gate electrode, a gate dielectric disposed on the gate electrode, and a channel layer disposed on the gate dielectric. The protection structure is laterally surrounding the gate electrode, the gate dielectric and the channel layer of the first transistor. The protection structure includes a first capping layer and a dielectric portion. The first capping layer is laterally surrounding and contacting the gate electrode, the gate dielectric and the channel layer of the first transistor. The dielectric portion is disposed on the first capping layer and laterally surrounding the first transistor.

Abstract: Manufacturing of a shoe or a portion of a shoe is enhanced by executing various shoe-manufacturing processes in an automated fashion. For example, information describing a shoe part may be determined, such as an identification, an orientation, a color, a surface topography, an alignment, a size, etc. Based on the information describing the shoe part, automated shoe-manufacturing apparatuses may be instructed to apply various shoe-manufacturing processes to the shoe part, such as a pickup and placement of the shoe part with a pickup tool.

Abstract: A semiconductor structure includes: an etch-stop dielectric layer overlying a substrate and including a first opening therethrough; a silicon oxide plate overlying the etch-stop dielectric layer and including a second opening therethrough; a first conductive structure including a first electrode and extending through the second opening and the first opening; a memory film contacting a top surface of the first conductive structure and including a material that provides at least two resistive states having different electrical resistivity; and a second conductive structure including a second electrode and contacting a top surface of the memory film.

Abstract: An encoding method includes: a first matching block of a current block is determined; motion compensation enhancement is performed on the first matching block to obtain at least one second matching block; motion information of the current block is determined according to the at least one second matching block; and the current block is encoded according to the motion information.

Abstract: A cathode arc source comprises: a cathode target; a first magnetic field source located above the target; a second magnetic field source located below the target; and a third magnetic field source located between the first and second magnetic field sources and having an opposite polarity to the first magnetic field source; wherein the resultant magnetic field from the first, second and third magnetic field sources has zero field strength in a direction substantially normal to the target at a position above the target. The invention also provides methods of striking a cathode target and methods of depositing coatings which can be carried out using the cathode arc source described herein.

Abstract: Integrated fan-out packages and methods of forming the same are disclosed. An integrated fan-out package includes two dies, an encapsulant, a first metal line and a plurality of dummy vias. The encapsulant is disposed between the two dies. The first metal line is disposed over the two dies and the encapsulant, and electrically connected to the two dies. The plurality of dummy vias is disposed over the encapsulant and aside the first metal line.

Abstract: There is provided a smoke detector including a first light source, a second light source surface, a light sensor and a processor. The light sensor receives reflected light when the first light source and the second light source emit light, and generates a first detection signal corresponding to light emission of the first light source and a second detection signal corresponding to light emission of the second light source. The processor distinguishes smoke and floating particles according to a similarity between the first detection signal and the second detection signal.

Abstract: Provided is a method for compensating a displayed picture in a display screen. The display screen includes a plurality of regions, each of the plurality of regions including a plurality of pixels; the method includes: determining transformation matrices corresponding to pixels in the plurality of regions based on texture complexities of pictures to be displayed in the plurality of regions; acquiring compensated grayscales by compensating grayscales of pixel points in the pictures to be displayed in the plurality of regions based on the transformation matrices corresponding to the pixels in the plurality of regions.

Abstract: There is provided a smoke detector including a substrate, a light source and a light sensor. The light source and the light sensor are arranged adjacently on the substrate. The substrate is arranged with an asymmetric structure to cause an illumination region of the light source to deviate toward the light sensor thereby increasing a ratio of light intensity reflected by smoke with respect to reference light intensity.

Abstract: A semiconductor device according to the present disclosure includes a gate-all-around (GAA) transistor in a first device area and a fin-type field effect transistor (FinFET) in a second device area. The GAA transistor includes a plurality of vertically stacked channel members and a first gate structure over and around the plurality of vertically stacked channel members. The FinFET includes a fin-shaped channel member and a second gate structure over the fin-shaped channel member. The fin-shaped channel member includes semiconductor layers interleaved by sacrificial layers.