Abstract: Disclosed is an electronic device having a display region and a peripheral region adjacent to the display region. The electronic device includes a first electrode disposed in the display region, a second electrode disposed in the display region, a circuit module disposed in the peripheral region, a first electrical trace, and a second electrical trace electrically insulated from the first electrical trace. The circuit module is electrically connected to the first electrode through the first electrical trace and provides a first driving voltage to the first electrical trace. The circuit module is electrically connected to the second electrode through the second electrical trace and provides a second driving voltage to the second electrical trace, and the first driving voltage is different from the second driving voltage. In a top view, the first electrical trace at least partially overlaps the second electrical trace.

Abstract: The present invention is related to a method for proximity sensing and an applied electronic device thereof. The present invention provides that a movement signal is generated according to a detection data, a move baseline data and a move threshold and cooperated with a proximity signal for generating a judgement signal to judge if the human body or the object body is close to the electronic device.

Abstract: The present invention is related to a method for proximity sensing and an applied electronic device thereof. The present invention provides that a movement signal is generated according to a detection data, a move baseline data and a move threshold and cooperated with a proximity signal for generating a judgement signal to judge if the human body or the object body is close to the electronic device.

Abstract: The present application provides a proximity detection method and circuit thereof. The circuit includes a detection circuit, a baseline generating circuit, and a proximity sensing circuit. The proximity sensing circuit generates a proximity signal according to a detection data generated by the detection circuit, a baseline data generated by the baseline generating circuit and a proximity threshold, and judges whether the proximity signal is valid according to the detection data, a reference data, and a valid threshold. The validity of the proximity signal may be judged according to the reference data and the valid threshold and thus avoiding false judgement caused by the influences of the ambient factors.

Abstract: The present disclosure, in some embodiments, relates to a silicon on insulator (SOI) substrate. The SOI substrate includes a dielectric layer disposed over a first substrate. The dielectric layer has an outside edge aligned with an outside edge of the first substrate. An active layer covers a first annular portion of an upper surface of the dielectric layer. The upper surface of the dielectric layer has a second annular portion that surrounds the first annular portion and extends to the outside edge of the dielectric layer. The second annular portion is uncovered by the active layer.

Abstract: The present invention provides a compensation circuit for display images and a method for determining compensation region for display images. The method calculates a first compensation boundary and a second compensation boundary corresponding to the locations of panel cut regions. The region between the first compensation boundary and the second compensation boundary is an image compensation region for compensating the pixels therein. Thereby, according to the compensation circuit and method of the present invention, the image compensation region can be determined corresponding to the locations of the panel cut regions. By adjusting the compensation boundaries, the image compensation region can be modified.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a supporting substrate. The semiconductor device structure also includes a first carrier-trapping layer covering the supporting substrate. The first carrier-trapping layer is doped with a group-IV dopant. The semiconductor device structure further includes an insulating layer covering the first carrier-trapping layer. In addition, the semiconductor device structure includes a semiconductor substrate over the insulating layer. The semiconductor device structure also includes a transistor. The transistor includes a gate stack over the semiconductor substrate and source and drain structures in the semiconductor substrate.

Abstract: The present invention provides a compensation circuit for display images and a method for determining compensation region for display images. The method calculates a first compensation boundary and a second compensation boundary corresponding to the locations of panel cut regions. The region between the first compensation boundary and the second compensation boundary is an image compensation region for compensating the pixels therein. Thereby, according to the compensation circuit and method of the present invention, the image compensation region can be determined corresponding to the locations of the panel cut regions. By adjusting the compensation boundaries, the image compensation region can be modified.

Abstract: The present disclosure, in some embodiments, relates to a silicon on insulator (SOI) substrate. The SOI substrate includes a dielectric layer disposed over a first substrate. The dielectric layer has an outside edge aligned with an outside edge of the first substrate. An active layer covers a first annular portion of an upper surface of the dielectric layer. The upper surface of the dielectric layer has a second annular portion that surrounds the first annular portion and extends to the outside edge of the dielectric layer. The second annular portion is uncovered by the active layer.

Abstract: The present disclosure, in some embodiments, relates to a method of forming an SOI substrate. The method may be performed by epitaxially forming a silicon-germanium (SiGe) layer over a sacrificial substrate and epitaxially forming a first active layer on the SiGe layer. The first active layer has a composition different than the SiGe layer. The sacrificial substrate and is flipped and the first active layer is bonded to an upper surface of a dielectric layer formed over a first substrate. The sacrificial substrate and the SiGe layer are removed and the first active layer is etched to define outermost sidewalls and to expose an outside edge of an upper surface of the dielectric layer. A contiguous active layer is formed by epitaxially forming a second active layer on the first active layer. The first active layer and the second active layer have a substantially same composition.

Abstract: The present disclosure, in some embodiments, relates to a method of forming an SOI substrate. The method may be performed by epitaxially forming a silicon-germanium (SiGe) layer over a sacrificial substrate and epitaxially forming a first active layer on the SiGe layer. The first active layer has a composition different than the SiGe layer. The sacrificial substrate and is flipped and the first active layer is bonded to an upper surface of a dielectric layer formed over a first substrate. The sacrificial substrate and the SiGe layer are removed and the first active layer is etched to define outermost sidewalls and to expose an outside edge of an upper surface of the dielectric layer. A contiguous active layer is formed by epitaxially forming a second active layer on the first active layer. The first active layer and the second active layer have a substantially same composition.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a supporting substrate. The semiconductor device structure also includes a first carrier-trapping layer covering the supporting substrate. The first carrier-trapping layer is doped with a group-IV dopant. The semiconductor device structure further includes an insulating layer covering the first carrier-trapping layer. In addition, the semiconductor device structure includes a semiconductor substrate over the insulating layer. The semiconductor device structure also includes a transistor. The transistor includes a gate stack over the semiconductor substrate and source and drain structures in the semiconductor substrate.

Abstract: A DC to AC conversion circuit including an inverter, a first inductor, a first capacitor, a second inductor and a second capacitor is provided. The inverter has two input contact points and two output contact points. The input contact points receive a DC signal, and the output contact points output an AC signal. The first terminal of the first inductor is coupled to one of the two output contact points. The first capacitor is coupled to the first inductor in parallel. The first terminal of the second capacitor is coupled to the second terminal of the first inductor, and the second terminal of the second capacitor is coupled to another one of two output contact points. The first terminal of the second inductor is coupled to the first terminal of the second capacitor, and the second terminal of the second inductor is coupled to a load.

Abstract: A method for forming a semiconductor device includes forming a hard mask layer over a substrate comprising a semiconductor material of a first conductivity type, and forming a plurality of trenches in the hard mask layer and extending into the substrate. Each trench has at least one side wall and a bottom wall. The method further includes forming at least one barrier insulator layer along the at least one side wall and over the bottom wall of each trench, removing the at least one barrier insulator layer over the bottom wall of each trench, and filling the plurality of trenches with a semiconductor material of a second conductivity type.

Abstract: A method for forming a semiconductor device includes forming a hard mask layer over a substrate comprising a semiconductor material of a first conductivity type, and forming a plurality of trenches in the hard mask layer and extending into the substrate. Each trench has at least one side wall and a bottom wall. The method further includes forming at least one barrier insulator layer along the at least one side wall and over the bottom wall of each trench, removing the at least one barrier insulator layer over the bottom wall of each trench, and filling the plurality of trenches with a semiconductor material of a second conductivity type.

Abstract: A DC-AC converter is provided. The DC-AC converter includes a time-varying DC power generating circuit, an AC power generating circuit and a transmission capacitor. The time-varying DC power generating circuit is controlled by a pulse width modulation (PWM) signal to transform a DC source into a time-varying DC power. With reference to the time-varying DC power, the AC power generating circuit is controlled by a first polarity switching and a second polarity switching signal to generate an AC power. The transmission capacitor, coupled to the time-varying DC power generating circuit and the AC power generating circuit, transmits the time-varying DC power from the time-varying DC generating circuit to the AC power generating circuit.

Abstract: A DC to AC conversion circuit including an inverter, a first inductor, a first capacitor, a second inductor and a second capacitor is provided. The inverter has two input contact points and two output contact points. The input contact points receive a DC signal, and the output contact points output an AC signal. The first terminal of the first inductor is coupled to one of the two output contact points. The first capacitor is coupled to the first inductor in parallel. The first terminal of the second capacitor is coupled to the second terminal of the first inductor, and the second terminal of the second capacitor is coupled to another one of two output contact points. The first terminal of the second inductor is coupled to the first terminal of the second capacitor, and the second terminal of the second inductor is coupled to a load.

Abstract: A DC-AC converter is provided. The DC-AC converter includes a time-varying DC power generating circuit, an AC power generating circuit and a transmission capacitor. The time-varying DC power generating circuit is controlled by a pulse width modulation (PWM) signal to transform a DC source into a time-varying DC power. With reference to the time-varying DC power, the AC power generating circuit is controlled by a first polarity switching and a second polarity switching signal to generate an AC power. The transmission capacitor, coupled to the time-varying DC power generating circuit and the AC power generating circuit, transmits the time-varying DC power from the time-varying DC generating circuit to the AC power generating circuit.

Abstract: An light emitting diode (LED) control, a plurality of duty cycle signals corresponding to a plurality of LEDs are stored in a dual-port memory by memory mapping. By sampling, the stored duty cycle signals are outputted to generate a plurality of parallel single-bit data each having one single bit. After the single-bit data are converted by a data transmission module, each bit of the single-bit data is serially outputted to a drive module to drive the LEDs. Thus, the ON duty cycles of the LEDs are modulated by pulse width modulation (PWM), light emitted from the LEDs are mixed in time-domain, and the brightness of the LEDs can be controlled.

Abstract: An N-phase full bridge power converter, comprising: a load device; a plurality of bridge legs, each being composed of two power switches; a plurality of transformers, each being coupled between two nodes each disposed between two power switches in two adjacent bridge legs on its primary side and coupled to the load device on its secondary side; and a plurality of inductors, each being connected between a node and the primary side of one of the transformers corresponding thereto.