Patents by Inventor Ming-Chi Huang
Ming-Chi Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10541317Abstract: Methods for, and structures formed by, wet process assisted approaches implemented in a replacement gate process are provided. Generally, in some examples, a wet etch process for removing a capping layer can form a first monolayer on the underlying layer as an adhesion layer and a second monolayer on, e.g., an interfacial dielectric layer between a gate spacer and a fin as an etch protection mechanism. Generally, in some examples, a wet process can form a monolayer on a metal layer, like a barrier layer of a work function tuning layer, as a hardmask for patterning of the metal layer.Type: GrantFiled: March 1, 2018Date of Patent: January 21, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ju-Li Huang, Chun-Sheng Liang, Ming-Chi Huang, Ming-Hsi Yeh, Ying-Liang Chuang, Hsin-Che Chiang
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Publication number: 20200006518Abstract: Embodiments of the present disclosure provide a method of cleaning a lanthanum containing substrate without formation of undesired lanthanum compounds during processing. In one embodiment, the cleaning method includes treating the lanthanum containing substrate with an acidic solution prior to cleaning the lanthanum containing substrate with a HF solution. The cleaning method permits using lanthanum doped high-k dielectric layer to modulate effective work function of the gate stack, thus, improving device performance.Type: ApplicationFiled: September 12, 2019Publication date: January 2, 2020Inventors: Ming-Chi Huang, Ying-Liang Chuang, Ming-Hsi Yeh, Kuo-Bin Huang
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Patent number: 10510756Abstract: In an embodiment, a method includes: forming a gate dielectric layer on an interface layer; forming a doping layer on the gate dielectric layer, the doping layer including a dipole-inducing element; annealing the doping layer to drive the dipole-inducing element through the gate dielectric layer to a first side of the gate dielectric layer adjacent the interface layer; removing the doping layer; forming a sacrificial layer on the gate dielectric layer, a material of the sacrificial layer reacting with residual dipole-inducing elements at a second side of the gate dielectric layer adjacent the sacrificial layer; removing the sacrificial layer; forming a capping layer on the gate dielectric layer; and forming a gate electrode layer on the capping layer.Type: GrantFiled: May 24, 2019Date of Patent: December 17, 2019Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng-Yen Tsai, Ming-Chi Huang, Zoe Chen, Wei-Chin Lee, Cheng-Lung Hung, Da-Yuan Lee, Weng Chang, Ching-Hwanq Su
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Publication number: 20190326282Abstract: Provided is a metal gate structure and related methods that include performing a metal gate cut process. The metal gate cut process includes a plurality of etching steps. For example, a first anisotropic dry etch is performed, a second isotropic dry etch is performed, and a third wet etch is performed. In some embodiments, the second isotropic etch removes a residual portion of a metal gate layer including a metal containing layer. In some embodiments, the third etch removes a residual portion of a dielectric layer.Type: ApplicationFiled: May 6, 2019Publication date: October 24, 2019Inventors: Ming-Chi HUANG, Ying-Liang CHUANG, Ming-Hsi YEH, Kuo-Bin HUANG
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Publication number: 20190273149Abstract: Methods for, and structures formed by, wet process assisted approaches implemented in a replacement gate process are provided. Generally, in some examples, a wet etch process for removing a capping layer can form a first monolayer on the underlying layer as an adhesion layer and a second monolayer on, e.g., an interfacial dielectric layer between a gate spacer and a fin as an etch protection mechanism. Generally, in some examples, a wet process can form a monolayer on a metal layer, like a barrier layer of a work function tuning layer, as a hardmask for patterning of the metal layer.Type: ApplicationFiled: March 1, 2018Publication date: September 5, 2019Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ju-Li HUANG, Chun-Sheng LIANG, Ming-Chi HUANG, Ming-Hsi YEH, Ying-Liang CHUANG, Hsin-Che CHIANG
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Publication number: 20190267458Abstract: A transistor includes a channel region, a gate stack, and source and drain structures. The channel region comprises silicon germanium and has a first silicon-to-germanium ratio. The gate stack is over the channel region and comprises a silicon germanium oxide layer over the channel region, a high-? dielectric layer over the silicon germanium oxide layer, and a gate electrode over the high-? dielectric layer. The silicon germanium oxide layer has a second silicon-to-germanium ratio. The second silicon-to-germanium ratio is substantially the same as the first silicon-to-germanium ratio. The channel region is between the source and drain structures.Type: ApplicationFiled: May 13, 2019Publication date: August 29, 2019Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Kuo-Sheng CHUANG, You-Hua CHOU, Ming-Chi HUANG
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Patent number: 10304835Abstract: In an embodiment, a method includes: forming a gate dielectric layer on an interface layer; forming a doping layer on the gate dielectric layer, the doping layer including a dipole-inducing element; annealing the doping layer to drive the dipole-inducing element through the gate dielectric layer to a first side of the gate dielectric layer adjacent the interface layer; removing the doping layer; forming a sacrificial layer on the gate dielectric layer, a material of the sacrificial layer reacting with residual dipole-inducing elements at a second side of the gate dielectric layer adjacent the sacrificial layer; removing the sacrificial layer; forming a capping layer on the gate dielectric layer; and forming a gate electrode layer on the capping layer.Type: GrantFiled: August 15, 2018Date of Patent: May 28, 2019Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng-Yen Tsai, Ming-Chi Huang, Zoe Chen, Wei-Chin Lee, Cheng-Lung Hung, Da-Yuan Lee, Weng Chang, Ching-Hwanq Su
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Patent number: 10290716Abstract: A semiconductor device has a semiconductor substrate. A silicon germanium layer is disposed on the semiconductor substrate. The silicon germanium layer has a first silicon-to-germanium ratio. A first gate structure is disposed on the silicon germanium layer, and the first gate structure includes an interfacial layer on the silicon germanium layer. The interface layer has a second silicon-to-germanium ratio substantially the same as the first silicon-to-germanium ratio of the silicon germanium layer. The first gate structure also includes a high-dielectric layer on the interfacial layer and a first gate electrode on the high-? dielectric layer.Type: GrantFiled: July 30, 2017Date of Patent: May 14, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Kuo-Sheng Chuang, You-Hua Chou, Ming-Chi Huang
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Patent number: 10283503Abstract: Provided is a metal gate structure and related methods that include performing a metal gate cut process. The metal gate cut process includes a plurality of etching steps. For example, a first anisotropic dry etch is performed, a second isotropic dry etch is performed, and a third wet etch is performed. In some embodiments, the second isotropic etch removes a residual portion of a metal gate layer including a metal containing layer. In some embodiments, the third etch removes a residual portion of a dielectric layer.Type: GrantFiled: October 31, 2017Date of Patent: May 7, 2019Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ming-Chi Huang, Ying-Liang Chuang, Ming-Hsi Yeh, Kuo-Bin Huang
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Publication number: 20190103325Abstract: A method includes forming a gate stack, which includes a first portion over a portion of a first semiconductor fin, a second portion over a portion of a second semiconductor fin, and a third portion connecting the first portion to the second portion. An anisotropic etching is performed on the third portion of the gate stack to form an opening between the first portion and the second portion. A footing portion of the third portion remains after the anisotropic etching. The method further includes performing an isotropic etching to remove a metal gate portion of the footing portion, and filling the opening with a dielectric material.Type: ApplicationFiled: April 30, 2018Publication date: April 4, 2019Inventors: Ming-Chi Huang, Kuo-Bin Huang, Ying-Liang Chuang, Ming-Hsi Yeh
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Publication number: 20190035786Abstract: Provided is a metal gate structure and related methods that include performing a metal gate cut process. The metal gate cut process includes a plurality of etching steps. For example, a first anisotropic dry etch is performed, a second isotropic dry etch is performed, and a third wet etch is performed. In some embodiments, the second isotropic etch removes a residual portion of a metal gate layer including a metal containing layer. In some embodiments, the third etch removes a residual portion of a dielectric layer.Type: ApplicationFiled: October 31, 2017Publication date: January 31, 2019Inventors: Ming-Chi HUANG, Ying-Liang CHUANG, Ming-Hsi YEH, Kuo-Bin HUANG
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Publication number: 20190006476Abstract: A semiconductor device has a semiconductor substrate. A silicon germanium layer is disposed on the semiconductor substrate. The silicon germanium layer has a first silicon-to-germanium ratio. A first gate structure is disposed on the silicon germanium layer, and the first gate structure includes an interfacial layer on the silicon germanium layer. The interface layer has a second silicon-to-germanium ratio substantially the same as the first silicon-to-germanium ratio of the silicon germanium layer. The first gate structure also includes a high-dielectric layer on the interfacial layer and a first gate electrode on the high-? dielectric layer.Type: ApplicationFiled: July 30, 2017Publication date: January 3, 2019Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Kuo-Sheng CHUANG, You-Hua CHOU, Ming-Chi HUANG
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Publication number: 20190006487Abstract: Embodiments of the present disclosure provide a method of cleaning a lanthanum containing substrate without formation of undesired lanthanum compounds during processing. In one embodiment, the cleaning method includes treating the lanthanum containing substrate with an acidic solution prior to cleaning the lanthanum containing substrate with a HF solution. The cleaning method permits using lanthanum doped high-k dielectric layer to modulate effective work function of the gate stack, thus, improving device performance.Type: ApplicationFiled: May 29, 2018Publication date: January 3, 2019Inventors: Ming-Chi Huang, Ying-Liang Chuang, Ming-Hsi Yeh, Kuo-Bin Huang
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Patent number: 8162147Abstract: A box for transporting is suitable for preserving a plurality of substrates. The box for transporting includes a box body and at least one partition plate. The box body has a bottom part and a plurality of first sidewalls. A plurality of first bumps arranged in array is disposed on the bottom part, and the first bumps define a plurality of supporting regions. The first sidewalls are connected to the bottom part, and a plurality of major grooves is disposed in inner surfaces of the first sidewalls, wherein a first preserving space is surrounded by the bottom part and the first sidewalls. The partition plate is leant against the supporting regions and inlayed into the major grooves, so as to divide the first preserving space into a plurality of preserving sub-spaces.Type: GrantFiled: March 17, 2011Date of Patent: April 24, 2012Assignee: Chunghwa Picture Tubes, Ltd.Inventors: Yun-Lung Ting, Hao-Yang Chang, Ming-Chi Huang, Hsin-An Chen, Chiao-Yi Chang
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Publication number: 20030073413Abstract: A bag for a mobile phone with a function of sealing is made of soft plastic material treated by way of high frequency thermo-bonding technique to form an air sac surrounding a transparent part. As soon as the air sac is filled with the air, the air sac swells and encloses the mobile phone contained in the bag so as to perform excellent shock mitigation after collision or falling down. Furthermore, the entire bag for a mobile phone can float on the water level while the user takes outdoor or aquatic activities so that it can provide an extremely good water resistance.Type: ApplicationFiled: October 17, 2001Publication date: April 17, 2003Inventor: Ming-Chi Huang
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Patent number: 5309571Abstract: A fire-protecting suit includes a fire protective clothing having a face mask for covering the head and a front pocket for keeping precious articles, a fire-proof eye shield, a mouthpiece and a cap-lamp respectively fastened to the face mask by elastic bands which, in turn, are sewn to the fire protective clothing, and an air tank (or a gas filter) and a battery power supply received inside the protective clothing and respectively connected to the mouthpiece and the cap-lamp by an air hose and an electric wire inside the protective clothing. The fire-protecting suit is folded up inside out when not in use. To use the suit, the face mask is put on the head to let the protective clothing be extended downwardly to cover the body. When the fire-protecting suit is in use, the air tank and the battery power supply are turned on, and then the hands are inserted through the sleeves of the protective clothing and extended out for saving things and performing a fire-fighting task.Type: GrantFiled: August 17, 1992Date of Patent: May 10, 1994Inventor: Ming-Chi Huang
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Patent number: 4852782Abstract: A set of equipment for playing golf. The set includes a full set of golf club heads, i.e., irons 404 and woods 405; a shaft 101 capable of ready disassembly or assembly of a selected head, e.g.Type: GrantFiled: January 21, 1987Date of Patent: August 1, 1989Inventors: Ko-Lee Wu, Ming-Chi Huang
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Patent number: 4785642Abstract: A decorative clip for use as a jewelry item is disclosed which shines and glitters in the dark and emits perfume. This shining and glittering effect is achieved by placing an LED or an LCD device powered by a small battery beneath a decorative housing. When the clip is worn, the circuit between the battery and the LED or LCD is completed such that current may flow. In addition, a perfume dispenser is provided integral to the clip such that a fragrance is continuously emitted without interacting with the body chemistry of the wearer of the clip. The perfume dispenser is detachable so that the perfume may be changed or refilled as the wearer desires.Type: GrantFiled: January 13, 1987Date of Patent: November 22, 1988Assignee: Eric Chiao ShihInventors: Yu-Mei Chin, Ming-Chi Huang