Abstract: A method of operating a fuzzy inference system to simplify a mesh capable of producing a high-quality approximate mesh and retaining good characteristics and appearance so that a good visual effect emerges. The invention utilizes a fuzzy inference system to integrate mesh attributes and estimate the cost in removing certain data, which serve as a criteria for mesh simplification. Hence, the invention is suitable for progressive meshes, multiresolution modeling rendering and progressive transmission on a network.

Abstract: A texture partition and transmission method for network progressive transmission and real-time rendering by using the Wavelet Coding Algorithm is disclosed. An image to be applied on a mesh is firstly partitioned into multiple image tiles. After that, each image tile is further converted by the use of Wavelet Coding Algorithm to a data string that can represent multiple resolution levels of the image. Further, the mesh is also divided into multiple tiles to respectively correspond to the partitioned image tiles. After the feature parameter of each mesh tile is obtained, the rendering resolution of the image tile, which is intended to be pasted on the mesh tile, can be determined by the feature parameter.

Abstract: A method of area partition in virtual environment is disclosed. It can be used to divide 3D (Three Dimensions) virtual environment into several subareas. The invention interposes neighboring subareas so that the subareas in the same plane and the subareas in adjacent planes mix with one another. Both the number of subareas adjacent to each subarea and the number of subareas an object crosses can be decreased, thus lowering the load in operations.

Abstract: A method of area partition in virtual environment is disclosed. It can be used to divide 3D (Three Dimensions) virtual environment into several subareas. The invention interposes neighboring subareas so that the subareas in the same plane and the subareas in adjacent planes mix with one another. Both the number of subareas adjacent to each subarea and the number of subareas an object crosses can be decreased, thus lowering the load in operations.

Abstract: A method of constructing a progressive mesh using a forest clustering algorithm and all types of error evaluation, for maintaining a quality with a height similar to an original mesh. The method is capable of reducing any number of vertices or triangles in a single step so as to produce a progressive mesh that enables a smooth and fast change of the resolution. The mesh is applicable to both network transmission and real-time rendering.

Abstract: Texture mapping of a primitive object uses multiple levels of detail. The primitive object is a triangle having three vertices. The pixel coordinates of the three vertices and their corresponding texture mapped coordinates satisfy three linear equations derived from the equation representing the plane on which the triangle belongs to. An equivalent formula derived from a standard formula for the multiple levels of detail can be computed by a plurality of constants forming the three linear equations. The plurality of constants are first determined by using the pixel coordinates and the corresponding texture mapped coordinates of the three vertices. By substituting the constants into the equivalent formula, the value for the multiple levels of detail can be computed. A lookup table is used to determine log2 function values that are required in the equivalent formula. The method can be realized by simple hardware and a high precision log2 lookup table to accomplish high quality texture mapping.

Abstract: A method of operating a fuzzy inference system to simplify a mesh capable of producing a high-quality approximate mesh and retaining good characteristics and appearance so that a good visual effect emerges. The invention utilizes a fuzzy inference system to integrate mesh attributes and estimate the cost in removing certain data, which serve as a criteria for mesh simplification. Hence, the invention is suitable for progressive meshes, multiresolution modeling rendering and progressive transmission on a network.

Abstract: A cache device and a method of using the same for data accesses according to the invention. Particularly, the cache device has a prefetch queue comparing circuit which comprises a cache hit/miss judging circuit, an address queue register and a prefetch condition judging circuit. The cache hit/miss judging circuit is used to judge whether a currently-read address coming from a bus is of cache hit or cache miss, wherein the address consists of an index address and a tag address. The address queue register directly stores the index address of the currently-read address plus a corresponding first one-bit flag signal if the cache hit/miss judging circuit judges that the currently-read address is of cache hit. The prefetch condition judging circuit is used to judge whether the index address of the currently-read address is the same as any index addresses already stored in the address queue register if the cache hit/miss judging circuit judges that the currently-read address is of cache miss.

Abstract: An apparatus and method for controlling an asynchronous dual port FIFO memory is provided. The asynchronous FIFO may operate at frequencies satisfying 0.5f2<f1<f2 or 0.5f1<f2<f1, where f2 is the write frequency if f1 is the read frequency, or vice versa. A FIFO in accordance with the present invention comprises a dual port random access memory, a read pointer, a write pointer, a synchronization circuit and a status indicator. In the FIFO design, the read pointer indicating the read address is a simple sequential counter, and the write pointer indicating the write address is a Gray code counter. Gray code to sequential count converters are used to convert the Gray codes to sequential counts. The synchronization circuit synchronizes the write pointer and the read pointer using a read clock. A status indicator with simple circuits is provided to indicate if the FIFO is almost full or empty.

Abstract: Disclosed is an improved computer graphics memory architecture. The architecture includes an address translation table (ATT) and a buffer. The address translation table receives information about desired pixel data and determines the physical address of the desired data. The buffer is connected to the ATT and has a dual bank which stores the color value and the Z value of a 3-D pixel. A buffer addressing method is also provided in which the address of the desired pixel information and associated control circuits may be quickly determined through an appropriate data arrangement in the buffer and an address transfer table.