Patents by Inventor Ming-Ho Lin
Ming-Ho Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240170896Abstract: A composite mounting type electrical connector includes an insulating shell, a plurality of terminals and a plurality of shielding members. The plurality of terminals are arranged in two rows parallel to each other, and a plurality of shielding members are arranged between the two rows of terminals and separated from each other by a predetermined distance to form insulation. The two rows of terminals are soldered to a circuit board by surface mounting technology and dual in line package process respectively. The ground terminals in the two columns of terminals are commonly connected to a shield spacer to form a common ground structure. The power terminals in the two columns of terminals are commonly connected to another shielding member to form a parallel connecting structure. The shielding members produce a shielding effect between two rows of terminals, which can prevent crosstalk therebetween.Type: ApplicationFiled: May 27, 2023Publication date: May 23, 2024Inventors: MING LUO, YUNG- CHANG LIN, YU-HUNG LIN, HUNG-TIEN CHANG, HSUAN HO CHUNG
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Patent number: 11991317Abstract: According to some embodiments, a method performed by a software defined wide area network (SD-WAN) controller communicably coupled to a voice gateway comprises determining a user profile from one or more stored user profiles is to be associated with an analog telephone and transmitting the user profile to the voice gateway. In particular embodiments, the SD-WAN controller may receive a request to associate the analog telephone with a user from the voice gateway.Type: GrantFiled: March 2, 2020Date of Patent: May 21, 2024Assignee: CISCO TECHNOLOGY, INC.Inventors: Haitao Zhang, Chang-Ho Lin, Jing Li, Ming Lin Chen, Nanditha Shenoy
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Patent number: 11981483Abstract: The present invention provides a quick-release valve module which includes a flexible grommet defining a channel, and a piston having a disc portion at an end thereof, wherein the disc portion of the piston is exposed to the flexible grommet.Type: GrantFiled: July 15, 2020Date of Patent: May 14, 2024Assignee: GUDENG PRECISION INDUSTRIAL CO., LTD.Inventors: Chia-Ho Chuang, Shu-Hung Lin, Ming-Chien Chiu
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Publication number: 20240088156Abstract: A semiconductor device includes at least one fin, a first dielectric layer and a second dielectric layer. The first dielectric layer is disposed on the at least one fin. The second dielectric layer between the at least one fin and the first dielectric layer. A thickness of the first dielectric layer on a sidewall of the at least one fin is less than a thickness of the second dielectric layer on the sidewall of the at least one fin.Type: ApplicationFiled: November 23, 2023Publication date: March 14, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng-I Lin, Chun-Heng Chen, Ming-Ho Lin, Chi-On Chui
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Patent number: 11855095Abstract: A semiconductor device includes a semiconductor substrate and a first dielectric layer. The semiconductor substrate includes at least one fin. The first dielectric layer is disposed on the at least one fin. A thickness of the first dielectric layer located on a top surface of the at least one fin is greater than a thickness of the first dielectric layer located on a sidewall of the at least one fin.Type: GrantFiled: March 29, 2022Date of Patent: December 26, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng-I Lin, Chun-Heng Chen, Ming-Ho Lin, Chi-On Chui
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Publication number: 20230207646Abstract: A method includes forming a fin protruding over a substrate; forming a conformal oxide layer over an upper surface and along sidewalls of the fin; performing an anisotropic oxide deposition or an anisotropic plasma treatment to form a non-conformal oxide layer over the upper surface and along the sidewalls of the fin; and forming a gate electrode over the fin, the conformal oxide layer and the non-conformal oxide layer being between the fin and the gate electrode.Type: ApplicationFiled: March 6, 2023Publication date: June 29, 2023Inventors: Ming-Ho Lin, Chun-Heng Chen, Xiong-Fei Yu, Chi Oh Chui
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Patent number: 11640977Abstract: A method includes forming a fin protruding over a substrate; forming a conformal oxide layer over an upper surface and along sidewalls of the fin; performing an anisotropic oxide deposition or an anisotropic plasma treatment to form a non-conformal oxide layer over the upper surface and along the sidewalls of the fin; and forming a gate electrode over the fin, the conformal oxide layer and the non-conformal oxide layer being between the fin and the gate electrode.Type: GrantFiled: September 21, 2020Date of Patent: May 2, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Ming-Ho Lin, Chun-Heng Chen, Xiong-Fei Yu, Chi On Chui
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Publication number: 20230008994Abstract: A method of forming a semiconductor device includes forming a first layer over a semiconductor fin and forming a second layer over the first layer. The first layer is a first material and the second layer is a second material different from the first layer. The second layer is thicker on a top of the semiconductor fin than along a sidewall of the semiconductor fin. The method further includes performing an oxidation process, the oxidation process oxidizing at least a portion of the second layer, and patterning the second layer and the first layer.Type: ApplicationFiled: January 5, 2022Publication date: January 12, 2023Inventors: Cheng-I Lin, Ming-Ho Lin, Da-Yuan Lee, Chi On Chui
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Publication number: 20220384611Abstract: A method of forming a semiconductor device includes forming a first layer on a semiconductor fin; forming a mask on the first layer, the mask being thicker on a top of the semiconductor fin than along a sidewall of the semiconductor fin. The first layer is thinned along the sidewall of the semiconductor fin using the mask. A second layer is formed on the semiconductor fin, the second layer covering the mask and the first layer. A dummy gate layer is formed on the semiconductor fin and patterned to expose a top surface of the semiconductor fin.Type: ApplicationFiled: August 4, 2021Publication date: December 1, 2022Inventors: Cheng-I Lin, Ming-Ho Lin, Chun-Heng Chen, Yung-Cheng Lu
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Publication number: 20220359720Abstract: A method includes forming a protruding structure, and forming a non-conformal film on the protruding structure using an Atomic Layer Deposition (ALD) process. The non-conformal film includes a top portion directly over the protruding structure, and a sidewall portion on a sidewall of the protruding structure. The top portion has a first thickness, and the sidewall portion has a second thickness smaller than the first thickness.Type: ApplicationFiled: July 20, 2022Publication date: November 10, 2022Inventors: Ming-Ho Lin, Cheng-I Lin, Chun-Heng Chen, Chi On Chui
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Patent number: 11437491Abstract: A method includes forming a protruding structure, and forming a non-conformal film on the protruding structure using an Atomic Layer Deposition (ALD) process. The non-conformal film includes a top portion directly over the protruding structure, and a sidewall portion on a sidewall of the protruding structure. The top portion has a first thickness, and the sidewall portion has a second thickness smaller than the first thickness.Type: GrantFiled: May 21, 2020Date of Patent: September 6, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Ming-Ho Lin, Cheng-I Lin, Chun-Heng Chen, Chi On Chui
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Publication number: 20220223595Abstract: A semiconductor device includes a semiconductor substrate and a first dielectric layer. The semiconductor substrate includes at least one fin. The first dielectric layer is disposed on the at least one fin. A thickness of the first dielectric layer located on a top surface of the at least one fin is greater than a thickness of the first dielectric layer located on a sidewall of the at least one fin.Type: ApplicationFiled: March 29, 2022Publication date: July 14, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng-I Lin, Chun-Heng Chen, Ming-Ho Lin, Chi-On Chui
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Patent number: 11296084Abstract: Provided are a deposition method, a semiconductor device and a method of fabricating the same. The semiconductor device includes a substrate and a dielectric structure. The substrate includes at least one fin thereon. The dielectric structure covers the at least one fin. A thickness of the dielectric structure located on a top surface of the at least one fin is greater than a thickness of the dielectric structure located on a sidewall of the at least one fin. The dielectric structure includes a first dielectric layer and a second dielectric layer. The first dielectric layer is conformally disposed on the at least one fin. The second dielectric layer is disposed on the first dielectric layer over the top surface of the at least one fin. A thickness of the second dielectric layer is greater than a thickness of the first dielectric layer.Type: GrantFiled: March 2, 2020Date of Patent: April 5, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng-I Lin, Chun-Heng Chen, Ming-Ho Lin, Chi-On Chui
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Publication number: 20210134983Abstract: A method includes forming a protruding structure, and forming a non-conformal film on the protruding structure using an Atomic Layer Deposition (ALD) process. The non-conformal film includes a top portion directly over the protruding structure, and a sidewall portion on a sidewall of the protruding structure. The top portion has a first thickness, and the sidewall portion has a second thickness smaller than the first thickness.Type: ApplicationFiled: May 21, 2020Publication date: May 6, 2021Inventors: Ming-Ho Lin, Cheng-I Lin, Chun-Heng Chen, Chi On Chui
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Publication number: 20210098458Abstract: Provided are a deposition method, a semiconductor device and a method of fabricating the same. The semiconductor device includes a substrate and a dielectric structure. The substrate includes at least one fin thereon. The dielectric structure covers the at least one fin. A thickness of the dielectric structure located on a top surface of the at least one fin is greater than a thickness of the dielectric structure located on a sidewall of the at least one fin. The dielectric structure includes a first dielectric layer and a second dielectric layer. The first dielectric layer is conformally disposed on the at least one fin. The second dielectric layer is disposed on the first dielectric layer over the top surface of the at least one fin. A thickness of the second dielectric layer is greater than a thickness of the first dielectric layer.Type: ApplicationFiled: March 2, 2020Publication date: April 1, 2021Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Cheng-I Lin, Chun-Heng Chen, Ming-Ho Lin, Chi-On Chui
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Publication number: 20210005727Abstract: A method includes forming a fin protruding over a substrate; forming a conformal oxide layer over an upper surface and along sidewalls of the fin; performing an anisotropic oxide deposition or an anisotropic plasma treatment to form a non-conformal oxide layer over the upper surface and along the sidewalls of the fin; and forming a gate electrode over the fin, the conformal oxide layer and the non-conformal oxide layer being between the fin and the gate electrode.Type: ApplicationFiled: September 21, 2020Publication date: January 7, 2021Inventors: Ming-Ho Lin, Chun-Heng Chen, Xiong-Fei Yu, Chi On Chui
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Patent number: 10784359Abstract: A method includes forming a fin protruding over a substrate; forming a conformal oxide layer over an upper surface and along sidewalls of the fin; performing an anisotropic oxide deposition or an anisotropic plasma treatment to form a non-conformal oxide layer over the upper surface and along the sidewalls of the fin; and forming a gate electrode over the fin, the conformal oxide layer and the non-conformal oxide layer being between the fin and the gate electrode.Type: GrantFiled: May 18, 2018Date of Patent: September 22, 2020Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ming-Ho Lin, Chun-Heng Chen, Xiong-Fei Yu, Chi On Chui
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Publication number: 20190355823Abstract: A method includes forming a fin protruding over a substrate; forming a conformal oxide layer over an upper surface and along sidewalls of the fin; performing an anisotropic oxide deposition or an anisotropic plasma treatment to form a non-conformal oxide layer over the upper surface and along the sidewalls of the fin; and forming a gate electrode over the fin, the conformal oxide layer and the non-conformal oxide layer being between the fin and the gate electrode.Type: ApplicationFiled: May 18, 2018Publication date: November 21, 2019Inventors: Ming-Ho Lin, Chun-Heng Chen, Xiong-Fei Yu, Chi On Chui
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Patent number: 9727147Abstract: An unlocking method and an electronic device are provided. The method is suitable for the electronic device having a touch screen and being in a screen lock mode. The method includes: displaying a first region and a second region on the touch screen; adjusting the first region and the second region according to a tilting state of the electronic device; receiving a touch operation performed on the touch screen; and switching the electronic device to an unlock mode when the touch operation starts in the first region and ends in the second region.Type: GrantFiled: October 5, 2014Date of Patent: August 8, 2017Assignee: Acer IncorporatedInventors: Hsiao-Lan Tsai, Ming-Ho Lin, Cheng-Hsiung Chiang, Wei-Yin Su
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Publication number: 20150177972Abstract: An unlocking method and an electronic device are provided. The method is suitable for the electronic device having a touch screen and being in a screen lock mode. The method includes: displaying a first region and a second region on the touch screen; adjusting the first region and the second region according to a tilting state of the electronic device; receiving a touch operation performed on the touch screen; and switching the electronic device to an unlock mode when the touch operation starts in the first region and ends in the second region.Type: ApplicationFiled: October 5, 2014Publication date: June 25, 2015Inventors: Hsiao-Lan Tsai, Ming-Ho Lin, Cheng-Hsiung Chiang, Wei-Yin Su