Patents by Inventor Ming-Hong Tseng

Ming-Hong Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120854
    Abstract: A triboelectric nanogenerating device is configured for providing an electric power to an electronic device and the triboelectric nanogenerating device includes at least one scaly triboelectric membrane configured for providing the electric power to the electronic device by frictional electrification. The at least one scaly triboelectric membrane includes a keratin and a polyvinyl alcohol, the at least one scaly triboelectric membrane has a first triboelectric surface, and the first triboelectric surface of the at least one scaly triboelectric membrane includes a plurality of scaly layers. Each of the scaly layers is arranged in order and extends along an orienting direction. A distal end of each of the scaly layers has a plurality of saw-tooth structures.
    Type: Application
    Filed: February 6, 2023
    Publication date: April 11, 2024
    Inventors: Zong-Hong Lin, Ming-Zheng Huang, Hsuan-Yu Yeh, An-Rong Chen, Yao-Hsuan Tseng
  • Patent number: 8624360
    Abstract: An integrated circuit structure includes a die including a semiconductor substrate; dielectric layers over the semiconductor substrate; an interconnect structure including metal lines and vias in the dielectric layers; a plurality of channels extending from inside the semiconductor substrate to inside the dielectric layers; and a dielectric film over the interconnect structure and sealing portions of the plurality of channels. The plurality of channels is configured to allow a fluid to flow through.
    Type: Grant
    Filed: November 11, 2009
    Date of Patent: January 7, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Ching, Ching-Wen Hsiao, Tsung-Ding Wang, Ming-Hong Tseng, Chen-Shien Chen
  • Patent number: 8390125
    Abstract: An integrated circuit structure includes a semiconductor substrate, a through-silicon via (TSV) extending into the semiconductor substrate, a pad formed over the semiconductor substrate and spaced apart from the TSV, and an interconnect structure formed over the semiconductor substrate and electrically connecting the TSV and the pad. The interconnect structure includes an upper portion formed on the pad and a lower portion adjacent to the pad, and the upper portion extends to electrically connect the TSV.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: March 5, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Hong Tseng, Sheng Huang Jao
  • Patent number: 8097953
    Abstract: A system, a structure and a method of manufacturing stacked semiconductor substrates is presented. A first substrate includes a first side and a second side. A through substrate via (TSV) protrudes from the first side of the first substrate. A first protruding portion of the TSV has a conductive protective coating and a second protruding portion of the TSV has an isolation liner. The system further includes a second substrate and a joint interface structure that bonds the second substrate to the first substrate at the conductive protective coating of the first protruding portion of the TSV.
    Type: Grant
    Filed: October 28, 2008
    Date of Patent: January 17, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Hong Tseng, Kai-Ming Ching, Chen-Shien Chen, Ching-Wen Hsiao, Hon-Lin Huang, Tsung-Ding Wang
  • Publication number: 20110169168
    Abstract: An integrated circuit structure includes a semiconductor substrate, a through-silicon via (TSV) extending into the semiconductor substrate, a pad formed over the semiconductor substrate and spaced apart from the TSV, and an interconnect structure formed over the semiconductor substrate and electrically connecting the TSV and the pad. The interconnect structure includes an upper portion formed on the pad and a lower portion adjacent to the pad, and the upper portion extends to electrically connect the TSV.
    Type: Application
    Filed: March 21, 2011
    Publication date: July 14, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ming-Hong TSENG, Sheng Huang JAO
  • Patent number: 7932608
    Abstract: An integrated circuit structure includes a semiconductor substrate, a through-silicon via (TSV) extending into the semiconductor substrate, a pad formed over the semiconductor substrate and spaced apart from the TSV, and an interconnect structure formed over the semiconductor substrate and electrically connecting the TSV and the pad. The interconnect structure includes an upper portion formed on the pad and a lower portion adjacent to the pad, and the upper portion extends to electrically connect the TSV.
    Type: Grant
    Filed: January 8, 2010
    Date of Patent: April 26, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Hong Tseng, Sheng Huang Jao
  • Publication number: 20100213612
    Abstract: An integrated circuit structure includes a semiconductor substrate, a through-silicon via (TSV) extending into the semiconductor substrate, a pad formed over the semiconductor substrate and spaced apart from the TSV, and an interconnect structure formed over the semiconductor substrate and electrically connecting the TSV and the pad. The interconnect structure includes an upper portion formed on the pad and a lower portion adjacent to the pad, and the upper portion extends to electrically connect the TSV.
    Type: Application
    Filed: January 8, 2010
    Publication date: August 26, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ming-Hong Tseng, Sheng Huang Jao
  • Publication number: 20100117201
    Abstract: An integrated circuit structure includes a die including a semiconductor substrate; dielectric layers over the semiconductor substrate; an interconnect structure including metal lines and vias in the dielectric layers; a plurality of channels extending from inside the semiconductor substrate to inside the dielectric layers; and a dielectric film over the interconnect structure and sealing portions of the plurality of channels. The plurality of channels is configured to allow a fluid to flow through.
    Type: Application
    Filed: November 11, 2009
    Publication date: May 13, 2010
    Inventors: Kai-Ming Ching, Ching-Wen Hsiao, Tsung-Ding Wang, Ming-Hong Tseng, Chen-Shien Chen
  • Publication number: 20100102453
    Abstract: A system, a structure and a method of manufacturing stacked semiconductor substrates is presented. A first substrate includes a first side and a second side. A through substrate via (TSV) protrudes from the first side of the first substrate. A first protruding portion of the TSV has a conductive protective coating and a second protruding portion of the TSV has an isolation liner. The system further includes a second substrate and a joint interface structure that bonds the second substrate to the first substrate at the conductive protective coating of the first protruding portion of the TSV.
    Type: Application
    Filed: October 28, 2008
    Publication date: April 29, 2010
    Inventors: Ming-Hong Tseng, Kai-Ming Ching, Chen-Shien Chen, Ching-Wen Hsiao, Hon-Lin Huang, Tsung-Ding Wang